1259 	u32 reg_base;  in ath12k_hal_srng_dst_hw_init()  local
1261 	reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];  in ath12k_hal_srng_dst_hw_init()
1264 		ath12k_hif_write32(ab, reg_base +  in ath12k_hal_srng_dst_hw_init()
1271 		ath12k_hif_write32(ab, reg_base +  in ath12k_hal_srng_dst_hw_init()
1275 				   reg_base + ath12k_hal_reo1_ring_msi1_data_offset(ab),  in ath12k_hal_srng_dst_hw_init()
1279 	ath12k_hif_write32(ab, reg_base, srng->ring_base_paddr);  in ath12k_hal_srng_dst_hw_init()
1285 	ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_base_msb_offset(ab), val);  in ath12k_hal_srng_dst_hw_init()
1289 	ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_id_offset(ab), val);  in ath12k_hal_srng_dst_hw_init()
1299 			   reg_base + ath12k_hal_reo1_ring_producer_int_setup_offset(ab),  in ath12k_hal_srng_dst_hw_init()
1305 	ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_hp_addr_lsb_offset(ab),  in ath12k_hal_srng_dst_hw_init()
1307 	ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_hp_addr_msb_offset(ab),  in ath12k_hal_srng_dst_hw_init()
1311 	reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2];  in ath12k_hal_srng_dst_hw_init()
1312 	ath12k_hif_write32(ab, reg_base, 0);  in ath12k_hal_srng_dst_hw_init()
1313 	ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_TP_OFFSET, 0);  in ath12k_hal_srng_dst_hw_init()
1316 	reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];  in ath12k_hal_srng_dst_hw_init()
1326 	ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_misc_offset(ab), val);  in ath12k_hal_srng_dst_hw_init()
1335 	u32 reg_base;  in ath12k_hal_srng_src_hw_init()  local
1337 	reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];  in ath12k_hal_srng_src_hw_init()
1340 		ath12k_hif_write32(ab, reg_base +  in ath12k_hal_srng_src_hw_init()
1347 		ath12k_hif_write32(ab, reg_base +  in ath12k_hal_srng_src_hw_init()
1351 		ath12k_hif_write32(ab, reg_base +  in ath12k_hal_srng_src_hw_init()
1356 	ath12k_hif_write32(ab, reg_base, srng->ring_base_paddr);  in ath12k_hal_srng_src_hw_init()
1362 	ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET, val);  in ath12k_hal_srng_src_hw_init()
1365 	ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_ID_OFFSET(ab), val);  in ath12k_hal_srng_src_hw_init()
1374 			   reg_base + HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab),  in ath12k_hal_srng_src_hw_init()
1383 			   reg_base + HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab),  in ath12k_hal_srng_src_hw_init()
1391 				   reg_base + HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab),  in ath12k_hal_srng_src_hw_init()
1394 				   reg_base + HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab),  in ath12k_hal_srng_src_hw_init()
1399 	reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2];  in ath12k_hal_srng_src_hw_init()
1400 	ath12k_hif_write32(ab, reg_base, 0);  in ath12k_hal_srng_src_hw_init()
1401 	ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_TP_OFFSET, 0);  in ath12k_hal_srng_src_hw_init()
1404 	reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];  in ath12k_hal_srng_src_hw_init()
1421 	ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_MISC_OFFSET(ab), val);  in ath12k_hal_srng_src_hw_init()
1905 	u32 reg_base;  in ath12k_hal_srng_setup()  local
1940 	reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2];  in ath12k_hal_srng_setup()
1952 					(u32 *)((unsigned long)ab->mem + reg_base);  in ath12k_hal_srng_setup()
1955 					   "hal type %d ring_num %d reg_base 0x%x shadow 0x%lx\n",  in ath12k_hal_srng_setup()
1957 					   reg_base,  in ath12k_hal_srng_setup()
1982 					(u32 *)((unsigned long)ab->mem + reg_base +  in ath12k_hal_srng_setup()
1988 					   reg_base + HAL_REO1_RING_TP - HAL_REO1_RING_HP,  in ath12k_hal_srng_setup()