Lines Matching +full:hp +full:- +full:cfg
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
6 #include <linux/dma-mapping.h>
247 return HAL_REO1_RING_ID(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_id_offset()
252 return HAL_REO1_RING_MSI1_BASE_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_msi1_base_lsb_offset()
257 return HAL_REO1_RING_MSI1_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_msi1_base_msb_offset()
262 return HAL_REO1_RING_MSI1_DATA(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_msi1_data_offset()
267 return HAL_REO1_RING_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_base_msb_offset()
272 return HAL_REO1_RING_PRODUCER_INT_SETUP(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_producer_int_setup_offset()
277 return HAL_REO1_RING_HP_ADDR_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_hp_addr_lsb_offset()
282 return HAL_REO1_RING_HP_ADDR_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_hp_addr_msb_offset()
287 return HAL_REO1_RING_MISC(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_misc_offset()
292 return !!le16_get_bits(desc->u.qcn9274.msdu_end.info5, in ath12k_hw_qcn9274_rx_desc_get_first_msdu()
298 return !!le16_get_bits(desc->u.qcn9274.msdu_end.info5, in ath12k_hw_qcn9274_rx_desc_get_last_msdu()
304 return le16_get_bits(desc->u.qcn9274.msdu_end.info5, in ath12k_hw_qcn9274_rx_desc_get_l3_pad_bytes()
310 return !!le32_get_bits(desc->u.qcn9274.mpdu_start.info4, in ath12k_hw_qcn9274_rx_desc_encrypt_valid()
316 return le32_get_bits(desc->u.qcn9274.mpdu_start.info2, in ath12k_hw_qcn9274_rx_desc_get_encrypt_type()
322 return le32_get_bits(desc->u.qcn9274.msdu_end.info11, in ath12k_hw_qcn9274_rx_desc_get_decap_type()
328 return le32_get_bits(desc->u.qcn9274.msdu_end.info11, in ath12k_hw_qcn9274_rx_desc_get_mesh_ctl()
334 return !!le32_get_bits(desc->u.qcn9274.mpdu_start.info4, in ath12k_hw_qcn9274_rx_desc_get_mpdu_seq_ctl_vld()
340 return !!le32_get_bits(desc->u.qcn9274.mpdu_start.info4, in ath12k_hw_qcn9274_rx_desc_get_mpdu_fc_valid()
346 return le32_get_bits(desc->u.qcn9274.mpdu_start.info4, in ath12k_hw_qcn9274_rx_desc_get_mpdu_start_seq_no()
352 return le32_get_bits(desc->u.qcn9274.msdu_end.info10, in ath12k_hw_qcn9274_rx_desc_get_msdu_len()
358 return le32_get_bits(desc->u.qcn9274.msdu_end.info12, in ath12k_hw_qcn9274_rx_desc_get_msdu_sgi()
364 return le32_get_bits(desc->u.qcn9274.msdu_end.info12, in ath12k_hw_qcn9274_rx_desc_get_msdu_rate_mcs()
370 return le32_get_bits(desc->u.qcn9274.msdu_end.info12, in ath12k_hw_qcn9274_rx_desc_get_msdu_rx_bw()
376 return __le32_to_cpu(desc->u.qcn9274.msdu_end.phy_meta_data); in ath12k_hw_qcn9274_rx_desc_get_msdu_freq()
381 return le32_get_bits(desc->u.qcn9274.msdu_end.info12, in ath12k_hw_qcn9274_rx_desc_get_msdu_pkt_type()
387 return le32_get_bits(desc->u.qcn9274.msdu_end.info12, in ath12k_hw_qcn9274_rx_desc_get_msdu_nss()
393 return le16_get_bits(desc->u.qcn9274.msdu_end.info5, in ath12k_hw_qcn9274_rx_desc_get_mpdu_tid()
399 return __le16_to_cpu(desc->u.qcn9274.mpdu_start.sw_peer_id); in ath12k_hw_qcn9274_rx_desc_get_mpdu_peer_id()
405 memcpy(&fdesc->u.qcn9274.msdu_end, &ldesc->u.qcn9274.msdu_end, in ath12k_hw_qcn9274_rx_desc_copy_end_tlv()
411 return __le16_to_cpu(desc->u.qcn9274.mpdu_start.phy_ppdu_id); in ath12k_hw_qcn9274_rx_desc_get_mpdu_ppdu_id()
416 u32 info = __le32_to_cpu(desc->u.qcn9274.msdu_end.info10); in ath12k_hw_qcn9274_rx_desc_set_msdu_len()
421 desc->u.qcn9274.msdu_end.info10 = __cpu_to_le32(info); in ath12k_hw_qcn9274_rx_desc_set_msdu_len()
426 return &desc->u.qcn9274.msdu_payload[0]; in ath12k_hw_qcn9274_rx_desc_get_msdu_payload()
441 return __le32_to_cpu(desc->u.qcn9274.mpdu_start.info4) & in ath12k_hw_qcn9274_rx_desc_mac_addr2_valid()
447 return desc->u.qcn9274.mpdu_start.addr2; in ath12k_hw_qcn9274_rx_desc_mpdu_start_addr2()
452 return __le16_to_cpu(desc->u.qcn9274.msdu_end.info5) & in ath12k_hw_qcn9274_rx_desc_is_da_mcbc()
459 hdr->frame_control = desc->u.qcn9274.mpdu_start.frame_ctrl; in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
460 hdr->duration_id = desc->u.qcn9274.mpdu_start.duration; in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
461 ether_addr_copy(hdr->addr1, desc->u.qcn9274.mpdu_start.addr1); in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
462 ether_addr_copy(hdr->addr2, desc->u.qcn9274.mpdu_start.addr2); in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
463 ether_addr_copy(hdr->addr3, desc->u.qcn9274.mpdu_start.addr3); in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
464 if (__le32_to_cpu(desc->u.qcn9274.mpdu_start.info4) & in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
466 ether_addr_copy(hdr->addr4, desc->u.qcn9274.mpdu_start.addr4); in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
468 hdr->seq_ctrl = desc->u.qcn9274.mpdu_start.seq_ctrl; in ath12k_hw_qcn9274_rx_desc_get_dot11_hdr()
483 HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9274.mpdu_start.pn[0]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
486 HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.qcn9274.mpdu_start.pn[0]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
493 HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.qcn9274.mpdu_start.pn[0]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
495 HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9274.mpdu_start.pn[0]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
505 key_id = le32_get_bits(desc->u.qcn9274.mpdu_start.info5, in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
508 crypto_hdr[4] = HAL_RX_MPDU_INFO_PN_GET_BYTE3(desc->u.qcn9274.mpdu_start.pn[0]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
509 crypto_hdr[5] = HAL_RX_MPDU_INFO_PN_GET_BYTE4(desc->u.qcn9274.mpdu_start.pn[0]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
510 crypto_hdr[6] = HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.qcn9274.mpdu_start.pn[1]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
511 crypto_hdr[7] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9274.mpdu_start.pn[1]); in ath12k_hw_qcn9274_rx_desc_get_crypto_hdr()
516 return __le16_to_cpu(desc->u.qcn9274.mpdu_start.frame_ctrl); in ath12k_hw_qcn9274_rx_desc_get_mpdu_frame_ctl()
521 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_create_config_qcn9274()
524 hal->srng_config = kmemdup(hw_srng_config_template, in ath12k_hal_srng_create_config_qcn9274()
527 if (!hal->srng_config) in ath12k_hal_srng_create_config_qcn9274()
528 return -ENOMEM; in ath12k_hal_srng_create_config_qcn9274()
530 s = &hal->srng_config[HAL_REO_DST]; in ath12k_hal_srng_create_config_qcn9274()
531 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
532 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
533 s->reg_size[0] = HAL_REO2_RING_BASE_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
534 s->reg_size[1] = HAL_REO2_RING_HP - HAL_REO1_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
536 s = &hal->srng_config[HAL_REO_EXCEPTION]; in ath12k_hal_srng_create_config_qcn9274()
537 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_SW0_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
538 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_SW0_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
540 s = &hal->srng_config[HAL_REO_REINJECT]; in ath12k_hal_srng_create_config_qcn9274()
541 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
542 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
543 s->reg_size[0] = HAL_SW2REO1_RING_BASE_LSB(ab) - HAL_SW2REO_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
544 s->reg_size[1] = HAL_SW2REO1_RING_HP - HAL_SW2REO_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
546 s = &hal->srng_config[HAL_REO_CMD]; in ath12k_hal_srng_create_config_qcn9274()
547 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
548 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP; in ath12k_hal_srng_create_config_qcn9274()
550 s = &hal->srng_config[HAL_REO_STATUS]; in ath12k_hal_srng_create_config_qcn9274()
551 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
552 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP; in ath12k_hal_srng_create_config_qcn9274()
554 s = &hal->srng_config[HAL_TCL_DATA]; in ath12k_hal_srng_create_config_qcn9274()
555 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB; in ath12k_hal_srng_create_config_qcn9274()
556 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
557 s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB; in ath12k_hal_srng_create_config_qcn9274()
558 s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
560 s = &hal->srng_config[HAL_TCL_CMD]; in ath12k_hal_srng_create_config_qcn9274()
561 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
562 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
564 s = &hal->srng_config[HAL_TCL_STATUS]; in ath12k_hal_srng_create_config_qcn9274()
565 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
566 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
568 s = &hal->srng_config[HAL_CE_SRC]; in ath12k_hal_srng_create_config_qcn9274()
569 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB; in ath12k_hal_srng_create_config_qcn9274()
570 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
571 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - in ath12k_hal_srng_create_config_qcn9274()
573 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - in ath12k_hal_srng_create_config_qcn9274()
576 s = &hal->srng_config[HAL_CE_DST]; in ath12k_hal_srng_create_config_qcn9274()
577 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB; in ath12k_hal_srng_create_config_qcn9274()
578 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
579 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_qcn9274()
581 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_qcn9274()
584 s = &hal->srng_config[HAL_CE_DST_STATUS]; in ath12k_hal_srng_create_config_qcn9274()
585 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + in ath12k_hal_srng_create_config_qcn9274()
587 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
588 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_qcn9274()
590 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_qcn9274()
593 s = &hal->srng_config[HAL_WBM_IDLE_LINK]; in ath12k_hal_srng_create_config_qcn9274()
594 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
595 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
597 s = &hal->srng_config[HAL_SW2WBM_RELEASE]; in ath12k_hal_srng_create_config_qcn9274()
598 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + in ath12k_hal_srng_create_config_qcn9274()
600 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_SW_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
601 s->reg_size[0] = HAL_WBM_SW1_RELEASE_RING_BASE_LSB(ab) - in ath12k_hal_srng_create_config_qcn9274()
603 s->reg_size[1] = HAL_WBM_SW1_RELEASE_RING_HP - HAL_WBM_SW_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
605 s = &hal->srng_config[HAL_WBM2SW_RELEASE]; in ath12k_hal_srng_create_config_qcn9274()
606 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
607 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
608 s->reg_size[0] = HAL_WBM1_RELEASE_RING_BASE_LSB(ab) - in ath12k_hal_srng_create_config_qcn9274()
610 s->reg_size[1] = HAL_WBM1_RELEASE_RING_HP - HAL_WBM0_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
617 s = &hal->srng_config[HAL_PPE2TCL]; in ath12k_hal_srng_create_config_qcn9274()
618 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_PPE2TCL1_RING_BASE_LSB; in ath12k_hal_srng_create_config_qcn9274()
619 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_PPE2TCL1_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
621 s = &hal->srng_config[HAL_PPE_RELEASE]; in ath12k_hal_srng_create_config_qcn9274()
622 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + in ath12k_hal_srng_create_config_qcn9274()
624 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_PPE_RELEASE_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
631 return !!le32_get_bits(desc->u.qcn9274.msdu_end.info14, in ath12k_hw_qcn9274_dp_rx_h_msdu_done()
637 return !!le32_get_bits(desc->u.qcn9274.msdu_end.info13, in ath12k_hw_qcn9274_dp_rx_h_l4_cksum_fail()
643 return !!le32_get_bits(desc->u.qcn9274.msdu_end.info13, in ath12k_hw_qcn9274_dp_rx_h_ip_cksum_fail()
649 return (le32_get_bits(desc->u.qcn9274.msdu_end.info14, in ath12k_hw_qcn9274_dp_rx_h_is_decrypted()
656 u32 info = __le32_to_cpu(desc->u.qcn9274.msdu_end.info13); in ath12k_hw_qcn9274_dp_rx_h_mpdu_err()
726 return !!le16_get_bits(desc->u.wcn7850.msdu_end.info5, in ath12k_hw_wcn7850_rx_desc_get_first_msdu()
732 return !!le16_get_bits(desc->u.wcn7850.msdu_end.info5, in ath12k_hw_wcn7850_rx_desc_get_last_msdu()
738 return le16_get_bits(desc->u.wcn7850.msdu_end.info5, in ath12k_hw_wcn7850_rx_desc_get_l3_pad_bytes()
744 return !!le32_get_bits(desc->u.wcn7850.mpdu_start.info4, in ath12k_hw_wcn7850_rx_desc_encrypt_valid()
750 return le32_get_bits(desc->u.wcn7850.mpdu_start.info2, in ath12k_hw_wcn7850_rx_desc_get_encrypt_type()
756 return le32_get_bits(desc->u.wcn7850.msdu_end.info11, in ath12k_hw_wcn7850_rx_desc_get_decap_type()
762 return le32_get_bits(desc->u.wcn7850.msdu_end.info11, in ath12k_hw_wcn7850_rx_desc_get_mesh_ctl()
768 return !!le32_get_bits(desc->u.wcn7850.mpdu_start.info4, in ath12k_hw_wcn7850_rx_desc_get_mpdu_seq_ctl_vld()
774 return !!le32_get_bits(desc->u.wcn7850.mpdu_start.info4, in ath12k_hw_wcn7850_rx_desc_get_mpdu_fc_valid()
780 return le32_get_bits(desc->u.wcn7850.mpdu_start.info4, in ath12k_hw_wcn7850_rx_desc_get_mpdu_start_seq_no()
786 return le32_get_bits(desc->u.wcn7850.msdu_end.info10, in ath12k_hw_wcn7850_rx_desc_get_msdu_len()
792 return le32_get_bits(desc->u.wcn7850.msdu_end.info12, in ath12k_hw_wcn7850_rx_desc_get_msdu_sgi()
798 return le32_get_bits(desc->u.wcn7850.msdu_end.info12, in ath12k_hw_wcn7850_rx_desc_get_msdu_rate_mcs()
804 return le32_get_bits(desc->u.wcn7850.msdu_end.info12, in ath12k_hw_wcn7850_rx_desc_get_msdu_rx_bw()
810 return __le32_to_cpu(desc->u.wcn7850.msdu_end.phy_meta_data); in ath12k_hw_wcn7850_rx_desc_get_msdu_freq()
815 return le32_get_bits(desc->u.wcn7850.msdu_end.info12, in ath12k_hw_wcn7850_rx_desc_get_msdu_pkt_type()
821 return le32_get_bits(desc->u.wcn7850.msdu_end.info12, in ath12k_hw_wcn7850_rx_desc_get_msdu_nss()
827 return le16_get_bits(desc->u.wcn7850.msdu_end.info5, in ath12k_hw_wcn7850_rx_desc_get_mpdu_tid()
833 return __le16_to_cpu(desc->u.wcn7850.mpdu_start.sw_peer_id); in ath12k_hw_wcn7850_rx_desc_get_mpdu_peer_id()
839 memcpy(&fdesc->u.wcn7850.msdu_end, &ldesc->u.wcn7850.msdu_end, in ath12k_hw_wcn7850_rx_desc_copy_end_tlv()
845 return le64_get_bits(desc->u.wcn7850.mpdu_start_tag, in ath12k_hw_wcn7850_rx_desc_get_mpdu_start_tag()
851 return __le16_to_cpu(desc->u.wcn7850.mpdu_start.phy_ppdu_id); in ath12k_hw_wcn7850_rx_desc_get_mpdu_ppdu_id()
856 u32 info = __le32_to_cpu(desc->u.wcn7850.msdu_end.info10); in ath12k_hw_wcn7850_rx_desc_set_msdu_len()
861 desc->u.wcn7850.msdu_end.info10 = __cpu_to_le32(info); in ath12k_hw_wcn7850_rx_desc_set_msdu_len()
866 return &desc->u.wcn7850.msdu_payload[0]; in ath12k_hw_wcn7850_rx_desc_get_msdu_payload()
881 return __le32_to_cpu(desc->u.wcn7850.mpdu_start.info4) & in ath12k_hw_wcn7850_rx_desc_mac_addr2_valid()
887 return desc->u.wcn7850.mpdu_start.addr2; in ath12k_hw_wcn7850_rx_desc_mpdu_start_addr2()
892 return __le16_to_cpu(desc->u.wcn7850.msdu_end.info5) & in ath12k_hw_wcn7850_rx_desc_is_da_mcbc()
899 hdr->frame_control = desc->u.wcn7850.mpdu_start.frame_ctrl; in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
900 hdr->duration_id = desc->u.wcn7850.mpdu_start.duration; in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
901 ether_addr_copy(hdr->addr1, desc->u.wcn7850.mpdu_start.addr1); in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
902 ether_addr_copy(hdr->addr2, desc->u.wcn7850.mpdu_start.addr2); in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
903 ether_addr_copy(hdr->addr3, desc->u.wcn7850.mpdu_start.addr3); in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
904 if (__le32_to_cpu(desc->u.wcn7850.mpdu_start.info4) & in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
906 ether_addr_copy(hdr->addr4, desc->u.wcn7850.mpdu_start.addr4); in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
908 hdr->seq_ctrl = desc->u.wcn7850.mpdu_start.seq_ctrl; in ath12k_hw_wcn7850_rx_desc_get_dot11_hdr()
923 HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.wcn7850.mpdu_start.pn[0]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
926 HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.wcn7850.mpdu_start.pn[0]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
933 HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.wcn7850.mpdu_start.pn[0]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
935 HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.wcn7850.mpdu_start.pn[0]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
945 key_id = u32_get_bits(__le32_to_cpu(desc->u.wcn7850.mpdu_start.info5), in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
948 crypto_hdr[4] = HAL_RX_MPDU_INFO_PN_GET_BYTE3(desc->u.wcn7850.mpdu_start.pn[0]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
949 crypto_hdr[5] = HAL_RX_MPDU_INFO_PN_GET_BYTE4(desc->u.wcn7850.mpdu_start.pn[0]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
950 crypto_hdr[6] = HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.wcn7850.mpdu_start.pn[1]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
951 crypto_hdr[7] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.wcn7850.mpdu_start.pn[1]); in ath12k_hw_wcn7850_rx_desc_get_crypto_hdr()
956 return __le16_to_cpu(desc->u.wcn7850.mpdu_start.frame_ctrl); in ath12k_hw_wcn7850_rx_desc_get_mpdu_frame_ctl()
961 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_create_config_wcn7850()
964 hal->srng_config = kmemdup(hw_srng_config_template, in ath12k_hal_srng_create_config_wcn7850()
967 if (!hal->srng_config) in ath12k_hal_srng_create_config_wcn7850()
968 return -ENOMEM; in ath12k_hal_srng_create_config_wcn7850()
970 s = &hal->srng_config[HAL_REO_DST]; in ath12k_hal_srng_create_config_wcn7850()
971 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
972 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
973 s->reg_size[0] = HAL_REO2_RING_BASE_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
974 s->reg_size[1] = HAL_REO2_RING_HP - HAL_REO1_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
976 s = &hal->srng_config[HAL_REO_EXCEPTION]; in ath12k_hal_srng_create_config_wcn7850()
977 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_SW0_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
978 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_SW0_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
980 s = &hal->srng_config[HAL_REO_REINJECT]; in ath12k_hal_srng_create_config_wcn7850()
981 s->max_rings = 1; in ath12k_hal_srng_create_config_wcn7850()
982 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
983 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
985 s = &hal->srng_config[HAL_REO_CMD]; in ath12k_hal_srng_create_config_wcn7850()
986 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
987 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP; in ath12k_hal_srng_create_config_wcn7850()
989 s = &hal->srng_config[HAL_REO_STATUS]; in ath12k_hal_srng_create_config_wcn7850()
990 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
991 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP; in ath12k_hal_srng_create_config_wcn7850()
993 s = &hal->srng_config[HAL_TCL_DATA]; in ath12k_hal_srng_create_config_wcn7850()
994 s->max_rings = 5; in ath12k_hal_srng_create_config_wcn7850()
995 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB; in ath12k_hal_srng_create_config_wcn7850()
996 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
997 s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB; in ath12k_hal_srng_create_config_wcn7850()
998 s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1000 s = &hal->srng_config[HAL_TCL_CMD]; in ath12k_hal_srng_create_config_wcn7850()
1001 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
1002 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1004 s = &hal->srng_config[HAL_TCL_STATUS]; in ath12k_hal_srng_create_config_wcn7850()
1005 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
1006 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1008 s = &hal->srng_config[HAL_CE_SRC]; in ath12k_hal_srng_create_config_wcn7850()
1009 s->max_rings = 12; in ath12k_hal_srng_create_config_wcn7850()
1010 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB; in ath12k_hal_srng_create_config_wcn7850()
1011 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1012 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - in ath12k_hal_srng_create_config_wcn7850()
1014 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG - in ath12k_hal_srng_create_config_wcn7850()
1017 s = &hal->srng_config[HAL_CE_DST]; in ath12k_hal_srng_create_config_wcn7850()
1018 s->max_rings = 12; in ath12k_hal_srng_create_config_wcn7850()
1019 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB; in ath12k_hal_srng_create_config_wcn7850()
1020 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1021 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_wcn7850()
1023 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_wcn7850()
1026 s = &hal->srng_config[HAL_CE_DST_STATUS]; in ath12k_hal_srng_create_config_wcn7850()
1027 s->max_rings = 12; in ath12k_hal_srng_create_config_wcn7850()
1028 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + in ath12k_hal_srng_create_config_wcn7850()
1030 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1031 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_wcn7850()
1033 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG - in ath12k_hal_srng_create_config_wcn7850()
1036 s = &hal->srng_config[HAL_WBM_IDLE_LINK]; in ath12k_hal_srng_create_config_wcn7850()
1037 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
1038 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1040 s = &hal->srng_config[HAL_SW2WBM_RELEASE]; in ath12k_hal_srng_create_config_wcn7850()
1041 s->max_rings = 1; in ath12k_hal_srng_create_config_wcn7850()
1042 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + in ath12k_hal_srng_create_config_wcn7850()
1044 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_SW_RELEASE_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1046 s = &hal->srng_config[HAL_WBM2SW_RELEASE]; in ath12k_hal_srng_create_config_wcn7850()
1047 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_wcn7850()
1048 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1049 s->reg_size[0] = HAL_WBM1_RELEASE_RING_BASE_LSB(ab) - in ath12k_hal_srng_create_config_wcn7850()
1051 s->reg_size[1] = HAL_WBM1_RELEASE_RING_HP - HAL_WBM0_RELEASE_RING_HP; in ath12k_hal_srng_create_config_wcn7850()
1053 s = &hal->srng_config[HAL_RXDMA_BUF]; in ath12k_hal_srng_create_config_wcn7850()
1054 s->max_rings = 2; in ath12k_hal_srng_create_config_wcn7850()
1055 s->mac_type = ATH12K_HAL_SRNG_PMAC; in ath12k_hal_srng_create_config_wcn7850()
1057 s = &hal->srng_config[HAL_RXDMA_DST]; in ath12k_hal_srng_create_config_wcn7850()
1058 s->max_rings = 1; in ath12k_hal_srng_create_config_wcn7850()
1059 s->entry_size = sizeof(struct hal_reo_entrance_ring) >> 2; in ath12k_hal_srng_create_config_wcn7850()
1062 s = &hal->srng_config[HAL_RXDMA_DIR_BUF]; in ath12k_hal_srng_create_config_wcn7850()
1063 s->max_rings = 0; in ath12k_hal_srng_create_config_wcn7850()
1065 s = &hal->srng_config[HAL_PPE2TCL]; in ath12k_hal_srng_create_config_wcn7850()
1066 s->max_rings = 0; in ath12k_hal_srng_create_config_wcn7850()
1068 s = &hal->srng_config[HAL_PPE_RELEASE]; in ath12k_hal_srng_create_config_wcn7850()
1069 s->max_rings = 0; in ath12k_hal_srng_create_config_wcn7850()
1071 s = &hal->srng_config[HAL_TX_MONITOR_BUF]; in ath12k_hal_srng_create_config_wcn7850()
1072 s->max_rings = 0; in ath12k_hal_srng_create_config_wcn7850()
1074 s = &hal->srng_config[HAL_TX_MONITOR_DST]; in ath12k_hal_srng_create_config_wcn7850()
1075 s->max_rings = 0; in ath12k_hal_srng_create_config_wcn7850()
1077 s = &hal->srng_config[HAL_PPE2TCL]; in ath12k_hal_srng_create_config_wcn7850()
1078 s->max_rings = 0; in ath12k_hal_srng_create_config_wcn7850()
1085 return !!le32_get_bits(desc->u.wcn7850.msdu_end.info14, in ath12k_hw_wcn7850_dp_rx_h_msdu_done()
1091 return !!le32_get_bits(desc->u.wcn7850.msdu_end.info13, in ath12k_hw_wcn7850_dp_rx_h_l4_cksum_fail()
1097 return !!le32_get_bits(desc->u.wcn7850.msdu_end.info13, in ath12k_hw_wcn7850_dp_rx_h_ip_cksum_fail()
1103 return (le32_get_bits(desc->u.wcn7850.msdu_end.info14, in ath12k_hw_wcn7850_dp_rx_h_is_decrypted()
1110 u32 info = __le32_to_cpu(desc->u.wcn7850.msdu_end.info13); in ath12k_hw_wcn7850_dp_rx_h_mpdu_err()
1181 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_alloc_cont_rdp()
1185 hal->rdp.vaddr = dma_alloc_coherent(ab->dev, size, &hal->rdp.paddr, in ath12k_hal_alloc_cont_rdp()
1187 if (!hal->rdp.vaddr) in ath12k_hal_alloc_cont_rdp()
1188 return -ENOMEM; in ath12k_hal_alloc_cont_rdp()
1195 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_free_cont_rdp()
1198 if (!hal->rdp.vaddr) in ath12k_hal_free_cont_rdp()
1202 dma_free_coherent(ab->dev, size, in ath12k_hal_free_cont_rdp()
1203 hal->rdp.vaddr, hal->rdp.paddr); in ath12k_hal_free_cont_rdp()
1204 hal->rdp.vaddr = NULL; in ath12k_hal_free_cont_rdp()
1209 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_alloc_cont_wrp()
1213 hal->wrp.vaddr = dma_alloc_coherent(ab->dev, size, &hal->wrp.paddr, in ath12k_hal_alloc_cont_wrp()
1215 if (!hal->wrp.vaddr) in ath12k_hal_alloc_cont_wrp()
1216 return -ENOMEM; in ath12k_hal_alloc_cont_wrp()
1223 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_free_cont_wrp()
1226 if (!hal->wrp.vaddr) in ath12k_hal_free_cont_wrp()
1230 dma_free_coherent(ab->dev, size, in ath12k_hal_free_cont_wrp()
1231 hal->wrp.vaddr, hal->wrp.paddr); in ath12k_hal_free_cont_wrp()
1232 hal->wrp.vaddr = NULL; in ath12k_hal_free_cont_wrp()
1238 struct hal_srng_config *srng_config = &ab->hal.srng_config[HAL_CE_DST]; in ath12k_hal_ce_dst_setup()
1243 srng_config->reg_start[HAL_SRNG_REG_GRP_R0] + in ath12k_hal_ce_dst_setup()
1244 ring_num * srng_config->reg_size[HAL_SRNG_REG_GRP_R0]; in ath12k_hal_ce_dst_setup()
1248 val |= u32_encode_bits(srng->u.dst_ring.max_buffer_length, in ath12k_hal_ce_dst_setup()
1256 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_dst_hw_init()
1261 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath12k_hal_srng_dst_hw_init()
1263 if (srng->flags & HAL_SRNG_FLAGS_MSI_INTR) { in ath12k_hal_srng_dst_hw_init()
1266 srng->msi_addr); in ath12k_hal_srng_dst_hw_init()
1268 val = u32_encode_bits(((u64)srng->msi_addr >> HAL_ADDR_MSB_REG_SHIFT), in ath12k_hal_srng_dst_hw_init()
1276 srng->msi_data); in ath12k_hal_srng_dst_hw_init()
1279 ath12k_hif_write32(ab, reg_base, srng->ring_base_paddr); in ath12k_hal_srng_dst_hw_init()
1281 val = u32_encode_bits(((u64)srng->ring_base_paddr >> HAL_ADDR_MSB_REG_SHIFT), in ath12k_hal_srng_dst_hw_init()
1283 u32_encode_bits((srng->entry_size * srng->num_entries), in ath12k_hal_srng_dst_hw_init()
1287 val = u32_encode_bits(srng->ring_id, HAL_REO1_RING_ID_RING_ID) | in ath12k_hal_srng_dst_hw_init()
1288 u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE); in ath12k_hal_srng_dst_hw_init()
1292 val = u32_encode_bits((srng->intr_timer_thres_us >> 3), in ath12k_hal_srng_dst_hw_init()
1295 val |= u32_encode_bits((srng->intr_batch_cntr_thres_entries * srng->entry_size), in ath12k_hal_srng_dst_hw_init()
1302 hp_addr = hal->rdp.paddr + in ath12k_hal_srng_dst_hw_init()
1303 ((unsigned long)srng->u.dst_ring.hp_addr - in ath12k_hal_srng_dst_hw_init()
1304 (unsigned long)hal->rdp.vaddr); in ath12k_hal_srng_dst_hw_init()
1311 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2]; in ath12k_hal_srng_dst_hw_init()
1314 *srng->u.dst_ring.hp_addr = 0; in ath12k_hal_srng_dst_hw_init()
1316 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath12k_hal_srng_dst_hw_init()
1318 if (srng->flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP) in ath12k_hal_srng_dst_hw_init()
1320 if (srng->flags & HAL_SRNG_FLAGS_RING_PTR_SWAP) in ath12k_hal_srng_dst_hw_init()
1322 if (srng->flags & HAL_SRNG_FLAGS_MSI_SWAP) in ath12k_hal_srng_dst_hw_init()
1332 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_src_hw_init()
1337 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath12k_hal_srng_src_hw_init()
1339 if (srng->flags & HAL_SRNG_FLAGS_MSI_INTR) { in ath12k_hal_srng_src_hw_init()
1342 srng->msi_addr); in ath12k_hal_srng_src_hw_init()
1344 val = u32_encode_bits(((u64)srng->msi_addr >> HAL_ADDR_MSB_REG_SHIFT), in ath12k_hal_srng_src_hw_init()
1353 srng->msi_data); in ath12k_hal_srng_src_hw_init()
1356 ath12k_hif_write32(ab, reg_base, srng->ring_base_paddr); in ath12k_hal_srng_src_hw_init()
1358 val = u32_encode_bits(((u64)srng->ring_base_paddr >> HAL_ADDR_MSB_REG_SHIFT), in ath12k_hal_srng_src_hw_init()
1360 u32_encode_bits((srng->entry_size * srng->num_entries), in ath12k_hal_srng_src_hw_init()
1364 val = u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE); in ath12k_hal_srng_src_hw_init()
1367 val = u32_encode_bits(srng->intr_timer_thres_us, in ath12k_hal_srng_src_hw_init()
1370 val |= u32_encode_bits((srng->intr_batch_cntr_thres_entries * srng->entry_size), in ath12k_hal_srng_src_hw_init()
1378 if (srng->flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) { in ath12k_hal_srng_src_hw_init()
1379 val |= u32_encode_bits(srng->u.src_ring.low_threshold, in ath12k_hal_srng_src_hw_init()
1386 if (srng->ring_id != HAL_SRNG_RING_ID_WBM_IDLE_LINK) { in ath12k_hal_srng_src_hw_init()
1387 tp_addr = hal->rdp.paddr + in ath12k_hal_srng_src_hw_init()
1388 ((unsigned long)srng->u.src_ring.tp_addr - in ath12k_hal_srng_src_hw_init()
1389 (unsigned long)hal->rdp.vaddr); in ath12k_hal_srng_src_hw_init()
1399 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2]; in ath12k_hal_srng_src_hw_init()
1402 *srng->u.src_ring.tp_addr = 0; in ath12k_hal_srng_src_hw_init()
1404 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath12k_hal_srng_src_hw_init()
1406 if (srng->flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP) in ath12k_hal_srng_src_hw_init()
1408 if (srng->flags & HAL_SRNG_FLAGS_RING_PTR_SWAP) in ath12k_hal_srng_src_hw_init()
1410 if (srng->flags & HAL_SRNG_FLAGS_MSI_SWAP) in ath12k_hal_srng_src_hw_init()
1418 if (srng->ring_id == HAL_SRNG_RING_ID_WBM_IDLE_LINK) in ath12k_hal_srng_src_hw_init()
1427 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath12k_hal_srng_hw_init()
1437 struct hal_srng_config *srng_config = &ab->hal.srng_config[type]; in ath12k_hal_srng_get_ring_id()
1440 if (ring_num >= srng_config->max_rings) { in ath12k_hal_srng_get_ring_id()
1442 return -EINVAL; in ath12k_hal_srng_get_ring_id()
1445 ring_id = srng_config->start_ring_id + ring_num; in ath12k_hal_srng_get_ring_id()
1446 if (srng_config->mac_type == ATH12K_HAL_SRNG_PMAC) in ath12k_hal_srng_get_ring_id()
1450 return -EINVAL; in ath12k_hal_srng_get_ring_id()
1460 return -EINVAL; in ath12k_hal_srng_get_entrysize()
1462 srng_config = &ab->hal.srng_config[ring_type]; in ath12k_hal_srng_get_entrysize()
1464 return (srng_config->entry_size << 2); in ath12k_hal_srng_get_entrysize()
1472 return -EINVAL; in ath12k_hal_srng_get_max_entries()
1474 srng_config = &ab->hal.srng_config[ring_type]; in ath12k_hal_srng_get_max_entries()
1476 return (srng_config->max_size / srng_config->entry_size); in ath12k_hal_srng_get_max_entries()
1482 params->ring_base_paddr = srng->ring_base_paddr; in ath12k_hal_srng_get_params()
1483 params->ring_base_vaddr = srng->ring_base_vaddr; in ath12k_hal_srng_get_params()
1484 params->num_entries = srng->num_entries; in ath12k_hal_srng_get_params()
1485 params->intr_timer_thres_us = srng->intr_timer_thres_us; in ath12k_hal_srng_get_params()
1486 params->intr_batch_cntr_thres_entries = in ath12k_hal_srng_get_params()
1487 srng->intr_batch_cntr_thres_entries; in ath12k_hal_srng_get_params()
1488 params->low_threshold = srng->u.src_ring.low_threshold; in ath12k_hal_srng_get_params()
1489 params->msi_addr = srng->msi_addr; in ath12k_hal_srng_get_params()
1490 params->msi2_addr = srng->msi2_addr; in ath12k_hal_srng_get_params()
1491 params->msi_data = srng->msi_data; in ath12k_hal_srng_get_params()
1492 params->msi2_data = srng->msi2_data; in ath12k_hal_srng_get_params()
1493 params->flags = srng->flags; in ath12k_hal_srng_get_params()
1499 if (!(srng->flags & HAL_SRNG_FLAGS_LMAC_RING)) in ath12k_hal_srng_get_hp_addr()
1502 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath12k_hal_srng_get_hp_addr()
1503 return ab->hal.wrp.paddr + in ath12k_hal_srng_get_hp_addr()
1504 ((unsigned long)srng->u.src_ring.hp_addr - in ath12k_hal_srng_get_hp_addr()
1505 (unsigned long)ab->hal.wrp.vaddr); in ath12k_hal_srng_get_hp_addr()
1507 return ab->hal.rdp.paddr + in ath12k_hal_srng_get_hp_addr()
1508 ((unsigned long)srng->u.dst_ring.hp_addr - in ath12k_hal_srng_get_hp_addr()
1509 (unsigned long)ab->hal.rdp.vaddr); in ath12k_hal_srng_get_hp_addr()
1515 if (!(srng->flags & HAL_SRNG_FLAGS_LMAC_RING)) in ath12k_hal_srng_get_tp_addr()
1518 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath12k_hal_srng_get_tp_addr()
1519 return ab->hal.rdp.paddr + in ath12k_hal_srng_get_tp_addr()
1520 ((unsigned long)srng->u.src_ring.tp_addr - in ath12k_hal_srng_get_tp_addr()
1521 (unsigned long)ab->hal.rdp.vaddr); in ath12k_hal_srng_get_tp_addr()
1523 return ab->hal.wrp.paddr + in ath12k_hal_srng_get_tp_addr()
1524 ((unsigned long)srng->u.dst_ring.tp_addr - in ath12k_hal_srng_get_tp_addr()
1525 (unsigned long)ab->hal.wrp.vaddr); in ath12k_hal_srng_get_tp_addr()
1545 desc->buffer_addr_low = cpu_to_le32(paddr & HAL_ADDR_LSB_REG_MASK); in ath12k_hal_ce_src_set_desc()
1546 desc->buffer_addr_info = in ath12k_hal_ce_src_set_desc()
1553 desc->meta_info = le32_encode_bits(id, HAL_CE_SRC_DESC_META_INFO_DATA); in ath12k_hal_ce_src_set_desc()
1558 desc->buffer_addr_low = cpu_to_le32(paddr & HAL_ADDR_LSB_REG_MASK); in ath12k_hal_ce_dst_set_desc()
1559 desc->buffer_addr_info = in ath12k_hal_ce_dst_set_desc()
1568 len = le32_get_bits(desc->flags, HAL_CE_DST_STATUS_DESC_FLAGS_LEN); in ath12k_hal_ce_dst_status_get_length()
1569 desc->flags &= ~cpu_to_le32(HAL_CE_DST_STATUS_DESC_FLAGS_LEN); in ath12k_hal_ce_dst_status_get_length()
1577 desc->buf_addr_info.info0 = le32_encode_bits((paddr & HAL_ADDR_LSB_REG_MASK), in ath12k_hal_set_link_desc_addr()
1579 desc->buf_addr_info.info1 = in ath12k_hal_set_link_desc_addr()
1588 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_dst_peek()
1590 if (srng->u.dst_ring.tp != srng->u.dst_ring.cached_hp) in ath12k_hal_srng_dst_peek()
1591 return (srng->ring_base_vaddr + srng->u.dst_ring.tp); in ath12k_hal_srng_dst_peek()
1601 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_dst_get_next_entry()
1603 if (srng->u.dst_ring.tp == srng->u.dst_ring.cached_hp) in ath12k_hal_srng_dst_get_next_entry()
1606 desc = srng->ring_base_vaddr + srng->u.dst_ring.tp; in ath12k_hal_srng_dst_get_next_entry()
1608 srng->u.dst_ring.tp = (srng->u.dst_ring.tp + srng->entry_size) % in ath12k_hal_srng_dst_get_next_entry()
1609 srng->ring_size; in ath12k_hal_srng_dst_get_next_entry()
1617 u32 tp, hp; in ath12k_hal_srng_dst_num_free() local
1619 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_dst_num_free()
1621 tp = srng->u.dst_ring.tp; in ath12k_hal_srng_dst_num_free()
1624 hp = *srng->u.dst_ring.hp_addr; in ath12k_hal_srng_dst_num_free()
1625 srng->u.dst_ring.cached_hp = hp; in ath12k_hal_srng_dst_num_free()
1627 hp = srng->u.dst_ring.cached_hp; in ath12k_hal_srng_dst_num_free()
1630 if (hp >= tp) in ath12k_hal_srng_dst_num_free()
1631 return (hp - tp) / srng->entry_size; in ath12k_hal_srng_dst_num_free()
1633 return (srng->ring_size - tp + hp) / srng->entry_size; in ath12k_hal_srng_dst_num_free()
1640 u32 tp, hp; in ath12k_hal_srng_src_num_free() local
1642 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_src_num_free()
1644 hp = srng->u.src_ring.hp; in ath12k_hal_srng_src_num_free()
1647 tp = *srng->u.src_ring.tp_addr; in ath12k_hal_srng_src_num_free()
1648 srng->u.src_ring.cached_tp = tp; in ath12k_hal_srng_src_num_free()
1650 tp = srng->u.src_ring.cached_tp; in ath12k_hal_srng_src_num_free()
1653 if (tp > hp) in ath12k_hal_srng_src_num_free()
1654 return ((tp - hp) / srng->entry_size) - 1; in ath12k_hal_srng_src_num_free()
1656 return ((srng->ring_size - hp + tp) / srng->entry_size) - 1; in ath12k_hal_srng_src_num_free()
1665 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_src_get_next_entry()
1673 next_hp = (srng->u.src_ring.hp + srng->entry_size) % srng->ring_size; in ath12k_hal_srng_src_get_next_entry()
1675 if (next_hp == srng->u.src_ring.cached_tp) in ath12k_hal_srng_src_get_next_entry()
1678 desc = srng->ring_base_vaddr + srng->u.src_ring.hp; in ath12k_hal_srng_src_get_next_entry()
1679 srng->u.src_ring.hp = next_hp; in ath12k_hal_srng_src_get_next_entry()
1687 srng->u.src_ring.reap_hp = next_hp; in ath12k_hal_srng_src_get_next_entry()
1698 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_src_reap_next()
1700 next_reap_hp = (srng->u.src_ring.reap_hp + srng->entry_size) % in ath12k_hal_srng_src_reap_next()
1701 srng->ring_size; in ath12k_hal_srng_src_reap_next()
1703 if (next_reap_hp == srng->u.src_ring.cached_tp) in ath12k_hal_srng_src_reap_next()
1706 desc = srng->ring_base_vaddr + next_reap_hp; in ath12k_hal_srng_src_reap_next()
1707 srng->u.src_ring.reap_hp = next_reap_hp; in ath12k_hal_srng_src_reap_next()
1717 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_src_get_next_reaped()
1719 if (srng->u.src_ring.hp == srng->u.src_ring.reap_hp) in ath12k_hal_srng_src_get_next_reaped()
1722 desc = srng->ring_base_vaddr + srng->u.src_ring.hp; in ath12k_hal_srng_src_get_next_reaped()
1723 srng->u.src_ring.hp = (srng->u.src_ring.hp + srng->entry_size) % in ath12k_hal_srng_src_get_next_reaped()
1724 srng->ring_size; in ath12k_hal_srng_src_get_next_reaped()
1731 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_access_begin()
1733 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath12k_hal_srng_access_begin()
1734 srng->u.src_ring.cached_tp = in ath12k_hal_srng_access_begin()
1735 *(volatile u32 *)srng->u.src_ring.tp_addr; in ath12k_hal_srng_access_begin()
1737 srng->u.dst_ring.cached_hp = *srng->u.dst_ring.hp_addr; in ath12k_hal_srng_access_begin()
1745 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_access_end()
1748 if (srng->flags & HAL_SRNG_FLAGS_LMAC_RING) { in ath12k_hal_srng_access_end()
1752 if (srng->ring_dir == HAL_SRNG_DIR_SRC) { in ath12k_hal_srng_access_end()
1753 srng->u.src_ring.last_tp = in ath12k_hal_srng_access_end()
1754 *(volatile u32 *)srng->u.src_ring.tp_addr; in ath12k_hal_srng_access_end()
1755 *srng->u.src_ring.hp_addr = srng->u.src_ring.hp; in ath12k_hal_srng_access_end()
1757 srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr; in ath12k_hal_srng_access_end()
1758 *srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp; in ath12k_hal_srng_access_end()
1761 if (srng->ring_dir == HAL_SRNG_DIR_SRC) { in ath12k_hal_srng_access_end()
1762 srng->u.src_ring.last_tp = in ath12k_hal_srng_access_end()
1763 *(volatile u32 *)srng->u.src_ring.tp_addr; in ath12k_hal_srng_access_end()
1765 (unsigned long)srng->u.src_ring.hp_addr - in ath12k_hal_srng_access_end()
1766 (unsigned long)ab->mem, in ath12k_hal_srng_access_end()
1767 srng->u.src_ring.hp); in ath12k_hal_srng_access_end()
1769 srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr; in ath12k_hal_srng_access_end()
1771 (unsigned long)srng->u.dst_ring.tp_addr - in ath12k_hal_srng_access_end()
1772 (unsigned long)ab->mem, in ath12k_hal_srng_access_end()
1773 srng->u.dst_ring.tp); in ath12k_hal_srng_access_end()
1777 srng->timestamp = jiffies; in ath12k_hal_srng_access_end()
1797 link_addr->info0 = cpu_to_le32(sbuf[i].paddr & HAL_ADDR_LSB_REG_MASK); in ath12k_hal_setup_link_idle_list()
1799 link_addr->info1 = in ath12k_hal_setup_link_idle_list()
1845 val = u32_encode_bits(sbuf[nsbufs - 1].paddr, BUFFER_ADDR_INFO0_ADDR); in ath12k_hal_setup_link_idle_list()
1851 val = u32_encode_bits(((u64)sbuf[nsbufs - 1].paddr >> HAL_ADDR_MSB_REG_SHIFT), in ath12k_hal_setup_link_idle_list()
1899 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_setup()
1900 struct hal_srng_config *srng_config = &ab->hal.srng_config[type]; in ath12k_hal_srng_setup()
1911 srng = &hal->srng_list[ring_id]; in ath12k_hal_srng_setup()
1913 srng->ring_id = ring_id; in ath12k_hal_srng_setup()
1914 srng->ring_dir = srng_config->ring_dir; in ath12k_hal_srng_setup()
1915 srng->ring_base_paddr = params->ring_base_paddr; in ath12k_hal_srng_setup()
1916 srng->ring_base_vaddr = params->ring_base_vaddr; in ath12k_hal_srng_setup()
1917 srng->entry_size = srng_config->entry_size; in ath12k_hal_srng_setup()
1918 srng->num_entries = params->num_entries; in ath12k_hal_srng_setup()
1919 srng->ring_size = srng->entry_size * srng->num_entries; in ath12k_hal_srng_setup()
1920 srng->intr_batch_cntr_thres_entries = in ath12k_hal_srng_setup()
1921 params->intr_batch_cntr_thres_entries; in ath12k_hal_srng_setup()
1922 srng->intr_timer_thres_us = params->intr_timer_thres_us; in ath12k_hal_srng_setup()
1923 srng->flags = params->flags; in ath12k_hal_srng_setup()
1924 srng->msi_addr = params->msi_addr; in ath12k_hal_srng_setup()
1925 srng->msi2_addr = params->msi2_addr; in ath12k_hal_srng_setup()
1926 srng->msi_data = params->msi_data; in ath12k_hal_srng_setup()
1927 srng->msi2_data = params->msi2_data; in ath12k_hal_srng_setup()
1928 srng->initialized = 1; in ath12k_hal_srng_setup()
1929 spin_lock_init(&srng->lock); in ath12k_hal_srng_setup()
1930 lockdep_set_class(&srng->lock, &srng->lock_key); in ath12k_hal_srng_setup()
1933 srng->hwreg_base[i] = srng_config->reg_start[i] + in ath12k_hal_srng_setup()
1934 (ring_num * srng_config->reg_size[i]); in ath12k_hal_srng_setup()
1937 memset(srng->ring_base_vaddr, 0, in ath12k_hal_srng_setup()
1938 (srng->entry_size * srng->num_entries) << 2); in ath12k_hal_srng_setup()
1940 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2]; in ath12k_hal_srng_setup()
1942 if (srng->ring_dir == HAL_SRNG_DIR_SRC) { in ath12k_hal_srng_setup()
1943 srng->u.src_ring.hp = 0; in ath12k_hal_srng_setup()
1944 srng->u.src_ring.cached_tp = 0; in ath12k_hal_srng_setup()
1945 srng->u.src_ring.reap_hp = srng->ring_size - srng->entry_size; in ath12k_hal_srng_setup()
1946 srng->u.src_ring.tp_addr = (void *)(hal->rdp.vaddr + ring_id); in ath12k_hal_srng_setup()
1947 srng->u.src_ring.low_threshold = params->low_threshold * in ath12k_hal_srng_setup()
1948 srng->entry_size; in ath12k_hal_srng_setup()
1949 if (srng_config->mac_type == ATH12K_HAL_SRNG_UMAC) { in ath12k_hal_srng_setup()
1950 if (!ab->hw_params->supports_shadow_regs) in ath12k_hal_srng_setup()
1951 srng->u.src_ring.hp_addr = in ath12k_hal_srng_setup()
1952 (u32 *)((unsigned long)ab->mem + reg_base); in ath12k_hal_srng_setup()
1958 (unsigned long)srng->u.src_ring.hp_addr - in ath12k_hal_srng_setup()
1959 (unsigned long)ab->mem); in ath12k_hal_srng_setup()
1961 idx = ring_id - HAL_SRNG_RING_ID_DMAC_CMN_ID_START; in ath12k_hal_srng_setup()
1962 srng->u.src_ring.hp_addr = (void *)(hal->wrp.vaddr + in ath12k_hal_srng_setup()
1964 srng->flags |= HAL_SRNG_FLAGS_LMAC_RING; in ath12k_hal_srng_setup()
1975 srng->u.dst_ring.loop_cnt = 1; in ath12k_hal_srng_setup()
1976 srng->u.dst_ring.tp = 0; in ath12k_hal_srng_setup()
1977 srng->u.dst_ring.cached_hp = 0; in ath12k_hal_srng_setup()
1978 srng->u.dst_ring.hp_addr = (void *)(hal->rdp.vaddr + ring_id); in ath12k_hal_srng_setup()
1979 if (srng_config->mac_type == ATH12K_HAL_SRNG_UMAC) { in ath12k_hal_srng_setup()
1980 if (!ab->hw_params->supports_shadow_regs) in ath12k_hal_srng_setup()
1981 srng->u.dst_ring.tp_addr = in ath12k_hal_srng_setup()
1982 (u32 *)((unsigned long)ab->mem + reg_base + in ath12k_hal_srng_setup()
1983 (HAL_REO1_RING_TP - HAL_REO1_RING_HP)); in ath12k_hal_srng_setup()
1988 reg_base + HAL_REO1_RING_TP - HAL_REO1_RING_HP, in ath12k_hal_srng_setup()
1989 (unsigned long)srng->u.dst_ring.tp_addr - in ath12k_hal_srng_setup()
1990 (unsigned long)ab->mem); in ath12k_hal_srng_setup()
1995 idx = ring_id - HAL_SRNG_RING_ID_DMAC_CMN_ID_START; in ath12k_hal_srng_setup()
1996 srng->u.dst_ring.tp_addr = (void *)(hal->wrp.vaddr + in ath12k_hal_srng_setup()
1998 srng->flags |= HAL_SRNG_FLAGS_LMAC_RING; in ath12k_hal_srng_setup()
2002 if (srng_config->mac_type != ATH12K_HAL_SRNG_UMAC) in ath12k_hal_srng_setup()
2008 srng->u.dst_ring.max_buffer_length = params->max_buffer_len; in ath12k_hal_srng_setup()
2021 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_update_hp_tp_addr()
2023 struct hal_srng_config *srng_config = &hal->srng_config[ring_type]; in ath12k_hal_srng_update_hp_tp_addr()
2029 srng = &hal->srng_list[ring_id]; in ath12k_hal_srng_update_hp_tp_addr()
2031 if (srng_config->ring_dir == HAL_SRNG_DIR_DST) in ath12k_hal_srng_update_hp_tp_addr()
2032 srng->u.dst_ring.tp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) + in ath12k_hal_srng_update_hp_tp_addr()
2033 (unsigned long)ab->mem); in ath12k_hal_srng_update_hp_tp_addr()
2035 srng->u.src_ring.hp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) + in ath12k_hal_srng_update_hp_tp_addr()
2036 (unsigned long)ab->mem); in ath12k_hal_srng_update_hp_tp_addr()
2043 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_update_shadow_config()
2044 struct hal_srng_config *srng_config = &hal->srng_config[ring_type]; in ath12k_hal_srng_update_shadow_config()
2045 int shadow_cfg_idx = hal->num_shadow_reg_configured; in ath12k_hal_srng_update_shadow_config()
2049 return -EINVAL; in ath12k_hal_srng_update_shadow_config()
2051 hal->num_shadow_reg_configured++; in ath12k_hal_srng_update_shadow_config()
2053 target_reg = srng_config->reg_start[HAL_HP_OFFSET_IN_REG_START]; in ath12k_hal_srng_update_shadow_config()
2054 target_reg += srng_config->reg_size[HAL_HP_OFFSET_IN_REG_START] * in ath12k_hal_srng_update_shadow_config()
2058 if (srng_config->ring_dir == HAL_SRNG_DIR_DST) in ath12k_hal_srng_update_shadow_config()
2061 hal->shadow_reg_addr[shadow_cfg_idx] = target_reg; in ath12k_hal_srng_update_shadow_config()
2063 /* update hp/tp addr to hal structure*/ in ath12k_hal_srng_update_shadow_config()
2079 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_shadow_config()
2082 /* update all the non-CE srngs. */ in ath12k_hal_srng_shadow_config()
2084 struct hal_srng_config *srng_config = &hal->srng_config[ring_type]; in ath12k_hal_srng_shadow_config()
2091 if (srng_config->mac_type == ATH12K_HAL_SRNG_DMAC || in ath12k_hal_srng_shadow_config()
2092 srng_config->mac_type == ATH12K_HAL_SRNG_PMAC) in ath12k_hal_srng_shadow_config()
2095 for (ring_num = 0; ring_num < srng_config->max_rings; ring_num++) in ath12k_hal_srng_shadow_config()
2101 u32 **cfg, u32 *len) in ath12k_hal_srng_get_shadow_config() argument
2103 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_get_shadow_config()
2105 *len = hal->num_shadow_reg_configured; in ath12k_hal_srng_get_shadow_config()
2106 *cfg = hal->shadow_reg_addr; in ath12k_hal_srng_get_shadow_config()
2112 lockdep_assert_held(&srng->lock); in ath12k_hal_srng_shadow_update_hp_tp()
2115 * HP only when then ring isn't' empty. in ath12k_hal_srng_shadow_update_hp_tp()
2117 if (srng->ring_dir == HAL_SRNG_DIR_SRC && in ath12k_hal_srng_shadow_update_hp_tp()
2118 *srng->u.src_ring.tp_addr != srng->u.src_ring.hp) in ath12k_hal_srng_shadow_update_hp_tp()
2125 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_register_srng_lock_keys()
2130 lockdep_register_key(&hal->srng_list[ring_id].lock_key); in ath12k_hal_register_srng_lock_keys()
2136 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_unregister_srng_lock_keys()
2141 lockdep_unregister_key(&hal->srng_list[ring_id].lock_key); in ath12k_hal_unregister_srng_lock_keys()
2146 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_init()
2151 ret = ab->hw_params->hal_ops->create_srng_config(ab); in ath12k_hal_srng_init()
2176 struct ath12k_hal *hal = &ab->hal; in ath12k_hal_srng_deinit()
2181 kfree(hal->srng_config); in ath12k_hal_srng_deinit()
2182 hal->srng_config = NULL; in ath12k_hal_srng_deinit()
2193 for (i = 0; i < ab->hw_params->ce_count; i++) { in ath12k_hal_dump_srng_stats()
2194 ce_pipe = &ab->ce.ce_pipe[i]; in ath12k_hal_dump_srng_stats()
2200 i, ce_pipe->pipe_num, in ath12k_hal_dump_srng_stats()
2201 jiffies_to_msecs(jiffies - ce_pipe->timestamp)); in ath12k_hal_dump_srng_stats()
2206 irq_grp = &ab->ext_irq_grp[i]; in ath12k_hal_dump_srng_stats()
2208 irq_grp->grp_id, in ath12k_hal_dump_srng_stats()
2209 jiffies_to_msecs(jiffies - irq_grp->timestamp)); in ath12k_hal_dump_srng_stats()
2213 srng = &ab->hal.srng_list[i]; in ath12k_hal_dump_srng_stats()
2215 if (!srng->initialized) in ath12k_hal_dump_srng_stats()
2218 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath12k_hal_dump_srng_stats()
2220 …"src srng id %u hp %u, reap_hp %u, cur tp %u, cached tp %u last tp %u napi processed before %ums\n… in ath12k_hal_dump_srng_stats()
2221 srng->ring_id, srng->u.src_ring.hp, in ath12k_hal_dump_srng_stats()
2222 srng->u.src_ring.reap_hp, in ath12k_hal_dump_srng_stats()
2223 *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp, in ath12k_hal_dump_srng_stats()
2224 srng->u.src_ring.last_tp, in ath12k_hal_dump_srng_stats()
2225 jiffies_to_msecs(jiffies - srng->timestamp)); in ath12k_hal_dump_srng_stats()
2226 else if (srng->ring_dir == HAL_SRNG_DIR_DST) in ath12k_hal_dump_srng_stats()
2228 "dst srng id %u tp %u, cur hp %u, cached hp %u last hp %u napi processed before %ums\n", in ath12k_hal_dump_srng_stats()
2229 srng->ring_id, srng->u.dst_ring.tp, in ath12k_hal_dump_srng_stats()
2230 *srng->u.dst_ring.hp_addr, in ath12k_hal_dump_srng_stats()
2231 srng->u.dst_ring.cached_hp, in ath12k_hal_dump_srng_stats()
2232 srng->u.dst_ring.last_hp, in ath12k_hal_dump_srng_stats()
2233 jiffies_to_msecs(jiffies - srng->timestamp)); in ath12k_hal_dump_srng_stats()