1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
28 #define HAL_WBM_IDLE_SCATTER_BUF_SIZE (HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX - \
35 #define HAL_SHADOW_BASE_ADDR(ab)		ab->hw_params.regs->hal_shadow_base_addr  argument
40 #define HAL_SHADOW_REG(ab, x) (HAL_SHADOW_BASE_ADDR(ab) + (4 * (x)))  argument
47 		(ab->hw_params.regs->hal_seq_wcss_umac_ce0_src_reg)
49 		(ab->hw_params.regs->hal_seq_wcss_umac_ce0_dst_reg)
51 		(ab->hw_params.regs->hal_seq_wcss_umac_ce1_src_reg)
53 		(ab->hw_params.regs->hal_seq_wcss_umac_ce1_dst_reg)
62 #define HAL_TCL1_RING_BASE_LSB(ab)		ab->hw_params.regs->hal_tcl1_ring_base_lsb  argument
63 #define HAL_TCL1_RING_BASE_MSB(ab)		ab->hw_params.regs->hal_tcl1_ring_base_msb  argument
64 #define HAL_TCL1_RING_ID(ab)			ab->hw_params.regs->hal_tcl1_ring_id  argument
65 #define HAL_TCL1_RING_MISC(ab)			ab->hw_params.regs->hal_tcl1_ring_misc  argument
66 #define HAL_TCL1_RING_TP_ADDR_LSB(ab) \  argument
67 	ab->hw_params.regs->hal_tcl1_ring_tp_addr_lsb
68 #define HAL_TCL1_RING_TP_ADDR_MSB(ab) \  argument
69 	ab->hw_params.regs->hal_tcl1_ring_tp_addr_msb
70 #define HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(ab) \  argument
71 	ab->hw_params.regs->hal_tcl1_ring_consumer_int_setup_ix0
72 #define HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(ab) \  argument
73 	ab->hw_params.regs->hal_tcl1_ring_consumer_int_setup_ix1
74 #define HAL_TCL1_RING_MSI1_BASE_LSB(ab) \  argument
75 	ab->hw_params.regs->hal_tcl1_ring_msi1_base_lsb
76 #define HAL_TCL1_RING_MSI1_BASE_MSB(ab) \  argument
77 	ab->hw_params.regs->hal_tcl1_ring_msi1_base_msb
78 #define HAL_TCL1_RING_MSI1_DATA(ab) \  argument
79 	ab->hw_params.regs->hal_tcl1_ring_msi1_data
80 #define HAL_TCL2_RING_BASE_LSB(ab)		ab->hw_params.regs->hal_tcl2_ring_base_lsb  argument
81 #define HAL_TCL_RING_BASE_LSB(ab)		ab->hw_params.regs->hal_tcl_ring_base_lsb  argument
83 #define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab)				\  argument
84 	(HAL_TCL1_RING_MSI1_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab))
85 #define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab)				\  argument
86 	(HAL_TCL1_RING_MSI1_BASE_MSB(ab) - HAL_TCL1_RING_BASE_LSB(ab))
87 #define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab)				\  argument
88 	(HAL_TCL1_RING_MSI1_DATA(ab) - HAL_TCL1_RING_BASE_LSB(ab))
89 #define HAL_TCL1_RING_BASE_MSB_OFFSET(ab)				\  argument
90 	(HAL_TCL1_RING_BASE_MSB(ab) - HAL_TCL1_RING_BASE_LSB(ab))
91 #define HAL_TCL1_RING_ID_OFFSET(ab)				\  argument
92 	(HAL_TCL1_RING_ID(ab) - HAL_TCL1_RING_BASE_LSB(ab))
93 #define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab)			\  argument
94 	(HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(ab) - HAL_TCL1_RING_BASE_LSB(ab))
95 #define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) \  argument
96 		(HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(ab) - HAL_TCL1_RING_BASE_LSB(ab))
97 #define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) \  argument
98 		(HAL_TCL1_RING_TP_ADDR_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab))
99 #define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) \  argument
100 		(HAL_TCL1_RING_TP_ADDR_MSB(ab) - HAL_TCL1_RING_BASE_LSB(ab))
101 #define HAL_TCL1_RING_MISC_OFFSET(ab) \  argument
102 		(HAL_TCL1_RING_MISC(ab) - HAL_TCL1_RING_BASE_LSB(ab))
111 		(HAL_TCL1_RING_TP - HAL_TCL1_RING_HP)
114 #define HAL_TCL_STATUS_RING_BASE_LSB(ab) \  argument
115 	ab->hw_params.regs->hal_tcl_status_ring_base_lsb
124 #define HAL_REO1_MISC_CTL(ab)			ab->hw_params.regs->hal_reo1_misc_ctl  argument
125 #define HAL_REO1_RING_BASE_LSB(ab)		ab->hw_params.regs->hal_reo1_ring_base_lsb  argument
126 #define HAL_REO1_RING_BASE_MSB(ab)		ab->hw_params.regs->hal_reo1_ring_base_msb  argument
127 #define HAL_REO1_RING_ID(ab)			ab->hw_params.regs->hal_reo1_ring_id  argument
128 #define HAL_REO1_RING_MISC(ab)			ab->hw_params.regs->hal_reo1_ring_misc  argument
129 #define HAL_REO1_RING_HP_ADDR_LSB(ab) \  argument
130 	ab->hw_params.regs->hal_reo1_ring_hp_addr_lsb
131 #define HAL_REO1_RING_HP_ADDR_MSB(ab) \  argument
132 	ab->hw_params.regs->hal_reo1_ring_hp_addr_msb
133 #define HAL_REO1_RING_PRODUCER_INT_SETUP(ab) \  argument
134 	ab->hw_params.regs->hal_reo1_ring_producer_int_setup
135 #define HAL_REO1_RING_MSI1_BASE_LSB(ab) \  argument
136 	ab->hw_params.regs->hal_reo1_ring_msi1_base_lsb
137 #define HAL_REO1_RING_MSI1_BASE_MSB(ab) \  argument
138 	ab->hw_params.regs->hal_reo1_ring_msi1_base_msb
139 #define HAL_REO1_RING_MSI1_DATA(ab) \  argument
140 	ab->hw_params.regs->hal_reo1_ring_msi1_data
141 #define HAL_REO2_RING_BASE_LSB(ab)		ab->hw_params.regs->hal_reo2_ring_base_lsb  argument
142 #define HAL_REO1_AGING_THRESH_IX_0(ab) \  argument
143 	ab->hw_params.regs->hal_reo1_aging_thresh_ix_0
144 #define HAL_REO1_AGING_THRESH_IX_1(ab) \  argument
145 	ab->hw_params.regs->hal_reo1_aging_thresh_ix_1
146 #define HAL_REO1_AGING_THRESH_IX_2(ab) \  argument
147 	ab->hw_params.regs->hal_reo1_aging_thresh_ix_2
148 #define HAL_REO1_AGING_THRESH_IX_3(ab) \  argument
149 	ab->hw_params.regs->hal_reo1_aging_thresh_ix_3
151 #define HAL_REO1_RING_MSI1_BASE_LSB_OFFSET(ab) \  argument
152 		(HAL_REO1_RING_MSI1_BASE_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
153 #define HAL_REO1_RING_MSI1_BASE_MSB_OFFSET(ab) \  argument
154 		(HAL_REO1_RING_MSI1_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
155 #define HAL_REO1_RING_MSI1_DATA_OFFSET(ab) \  argument
156 		(HAL_REO1_RING_MSI1_DATA(ab) - HAL_REO1_RING_BASE_LSB(ab))
157 #define HAL_REO1_RING_BASE_MSB_OFFSET(ab) \  argument
158 		(HAL_REO1_RING_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
159 #define HAL_REO1_RING_ID_OFFSET(ab) (HAL_REO1_RING_ID(ab) - HAL_REO1_RING_BASE_LSB(ab))  argument
160 #define HAL_REO1_RING_PRODUCER_INT_SETUP_OFFSET(ab) \  argument
161 		(HAL_REO1_RING_PRODUCER_INT_SETUP(ab) - HAL_REO1_RING_BASE_LSB(ab))
162 #define HAL_REO1_RING_HP_ADDR_LSB_OFFSET(ab) \  argument
163 		(HAL_REO1_RING_HP_ADDR_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
164 #define HAL_REO1_RING_HP_ADDR_MSB_OFFSET(ab) \  argument
165 		(HAL_REO1_RING_HP_ADDR_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab))
166 #define HAL_REO1_RING_MISC_OFFSET(ab) \  argument
167 	(HAL_REO1_RING_MISC(ab) - HAL_REO1_RING_BASE_LSB(ab))
170 #define HAL_REO1_RING_HP(ab)			ab->hw_params.regs->hal_reo1_ring_hp  argument
171 #define HAL_REO1_RING_TP(ab)			ab->hw_params.regs->hal_reo1_ring_tp  argument
172 #define HAL_REO2_RING_HP(ab)			ab->hw_params.regs->hal_reo2_ring_hp  argument
174 #define HAL_REO1_RING_TP_OFFSET(ab)	(HAL_REO1_RING_TP(ab) - HAL_REO1_RING_HP(ab))  argument
177 #define HAL_REO_TCL_RING_BASE_LSB(ab) \  argument
178 	ab->hw_params.regs->hal_reo_tcl_ring_base_lsb
181 #define HAL_REO_TCL_RING_HP(ab)			ab->hw_params.regs->hal_reo_tcl_ring_hp  argument
184 #define HAL_REO_CMD_RING_BASE_LSB(ab) \  argument
185 	ab->hw_params.regs->hal_reo_cmd_ring_base_lsb
188 #define HAL_REO_CMD_HP(ab)			ab->hw_params.regs->hal_reo_cmd_ring_hp  argument
191 #define HAL_SW2REO_RING_BASE_LSB(ab) \  argument
192 	ab->hw_params.regs->hal_sw2reo_ring_base_lsb
195 #define HAL_SW2REO_RING_HP(ab)			ab->hw_params.regs->hal_sw2reo_ring_hp  argument
207 #define HAL_REO_STATUS_RING_BASE_LSB(ab) \  argument
208 	ab->hw_params.regs->hal_reo_status_ring_base_lsb
209 #define HAL_REO_STATUS_HP(ab)			ab->hw_params.regs->hal_reo_status_hp  argument
213 		(ab->hw_params.regs->hal_wbm_idle_link_ring_base_lsb)
215 		(ab->hw_params.regs->hal_wbm_idle_link_ring_misc)
231 		(ab->hw_params.regs->hal_wbm_release_ring_base_lsb)
238 		(ab->hw_params.regs->hal_wbm0_release_ring_base_lsb)
240 		(ab->hw_params.regs->hal_wbm1_release_ring_base_lsb)
421 #define HAL_SRNG_RINGS_PER_LMAC (HAL_SRNG_RING_ID_LMAC1_ID_END - \
560 	/* Interrupt timer threshold - in micro seconds */
563 	/* Interrupt batch counter threshold - in number of ring entries */
579 	 * TBD: See if this is required - register address can be derived
600 			/* Tail pointer location to be updated by SW - This
629 			/* Head pointer location to be updated by SW - This
635 			/* Low threshold - in number of ring entries */
644 /* Interrupt mitigation - Batch threshold in terms of number of frames */
649 /* Interrupt mitigation - timer threshold in us */
673  * @HAL_RX_BUF_RBM_SW0_BM: For Tx completion -- returned to host
674  * @HAL_RX_BUF_RBM_SW1_BM: For Tx completion -- returned to host
675  * @HAL_RX_BUF_RBM_SW2_BM: For Tx completion -- returned to host
676  * @HAL_RX_BUF_RBM_SW3_BM: For Rx release -- returned to host
802 	u32 rx_bitmap[8]; /* Bitmap from 0-255 */
921 void ath11k_hal_reo_init_cmd_ring(struct ath11k_base *ab,
923 void ath11k_hal_setup_link_idle_list(struct ath11k_base *ab,
928 dma_addr_t ath11k_hal_srng_get_tp_addr(struct ath11k_base *ab,
930 dma_addr_t ath11k_hal_srng_get_hp_addr(struct ath11k_base *ab,
939 int ath11k_hal_srng_get_entrysize(struct ath11k_base *ab, u32 ring_type);
940 int ath11k_hal_srng_get_max_entries(struct ath11k_base *ab, u32 ring_type);
941 void ath11k_hal_srng_get_params(struct ath11k_base *ab, struct hal_srng *srng,
943 u32 *ath11k_hal_srng_dst_get_next_entry(struct ath11k_base *ab,
945 u32 *ath11k_hal_srng_dst_peek(struct ath11k_base *ab, struct hal_srng *srng);
946 int ath11k_hal_srng_dst_num_free(struct ath11k_base *ab, struct hal_srng *srng,
948 u32 *ath11k_hal_srng_src_peek(struct ath11k_base *ab, struct hal_srng *srng);
949 u32 *ath11k_hal_srng_src_get_next_reaped(struct ath11k_base *ab,
951 u32 *ath11k_hal_srng_src_reap_next(struct ath11k_base *ab,
953 u32 *ath11k_hal_srng_src_get_next_entry(struct ath11k_base *ab,
955 int ath11k_hal_srng_src_num_free(struct ath11k_base *ab, struct hal_srng *srng,
957 void ath11k_hal_srng_access_begin(struct ath11k_base *ab,
959 void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng);
960 int ath11k_hal_srng_setup(struct ath11k_base *ab, enum hal_ring_type type,
965 void ath11k_hal_dump_srng_stats(struct ath11k_base *ab);
966 void ath11k_hal_srng_get_shadow_config(struct ath11k_base *ab,
968 int ath11k_hal_srng_update_shadow_config(struct ath11k_base *ab,
971 void ath11k_hal_srng_shadow_config(struct ath11k_base *ab);
972 void ath11k_hal_srng_shadow_update_hp_tp(struct ath11k_base *ab,