260 	       srng_config->reg_start[HAL_SRNG_REG_GRP_R0] +  in ath11k_hal_ce_dst_setup()
993 		srng->hwreg_base[i] = srng_config->reg_start[i] +  in ath11k_hal_srng_setup()
1119 	target_reg = srng_config->reg_start[HAL_HP_OFFSET_IN_REG_START];  in ath11k_hal_srng_update_shadow_config()
1199 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1200 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_HP(ab);  in ath11k_hal_srng_create_config()
1205 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1206 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_HP(ab);  in ath11k_hal_srng_create_config()
1209 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1210 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP(ab);  in ath11k_hal_srng_create_config()
1213 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1214 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP(ab);  in ath11k_hal_srng_create_config()
1217 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1218 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP(ab);  in ath11k_hal_srng_create_config()
1221 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1222 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP;  in ath11k_hal_srng_create_config()
1227 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1228 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_HP;  in ath11k_hal_srng_create_config()
1231 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1232 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;  in ath11k_hal_srng_create_config()
1235 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB +  in ath11k_hal_srng_create_config()
1237 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP +  in ath11k_hal_srng_create_config()
1245 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB +  in ath11k_hal_srng_create_config()
1247 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP +  in ath11k_hal_srng_create_config()
1255 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +  in ath11k_hal_srng_create_config()
1257 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP +  in ath11k_hal_srng_create_config()
1265 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1266 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_HP;  in ath11k_hal_srng_create_config()
1269 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_RELEASE_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1270 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_RELEASE_RING_HP;  in ath11k_hal_srng_create_config()
1273 	s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_BASE_LSB(ab);  in ath11k_hal_srng_create_config()
1274 	s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_HP;  in ath11k_hal_srng_create_config()