1 // SPDX-License-Identifier: ISC
3  * Copyright (c) 2014-2017 Qualcomm Atheros, Inc.
15 #include "wmi-ops.h"
91 	 * CE0 and CE1 no other copy engine is directly referred in the code.
94 	 *	Copy Engine		Address
129 	 *      Copy Engine             Address
559 	survey->filled |= SURVEY_INFO_TIME |  in ath10k_hw_fill_survey_time()
562 	wraparound_type = ar->hw_params.cc_wraparound_type;  in ath10k_hw_fill_survey_time()
569 				survey->filled &= ~SURVEY_INFO_TIME_BUSY;  in ath10k_hw_fill_survey_time()
584 	cc -= cc_prev - cc_fix;  in ath10k_hw_fill_survey_time()
585 	rcc -= rcc_prev - rcc_fix;  in ath10k_hw_fill_survey_time()
587 	survey->time = CCNT_TO_MSEC(ar, cc);  in ath10k_hw_fill_survey_time()
588 	survey->time_busy = CCNT_TO_MSEC(ar, rcc);  in ath10k_hw_fill_survey_time()
607 	mutex_lock(&ar->conf_mutex);  in ath10k_hw_qca988x_set_coverage_class()
610 	if ((ar->state != ATH10K_STATE_ON) &&  in ath10k_hw_qca988x_set_coverage_class()
611 	    (ar->state != ATH10K_STATE_RESTARTED)) {  in ath10k_hw_qca988x_set_coverage_class()
612 		spin_lock_bh(&ar->data_lock);  in ath10k_hw_qca988x_set_coverage_class()
614 		ar->fw_coverage.coverage_class = value;  in ath10k_hw_qca988x_set_coverage_class()
615 		spin_unlock_bh(&ar->data_lock);  in ath10k_hw_qca988x_set_coverage_class()
631 		value = ar->fw_coverage.coverage_class;  in ath10k_hw_qca988x_set_coverage_class()
636 	if (value == ar->fw_coverage.coverage_class &&  in ath10k_hw_qca988x_set_coverage_class()
637 	    slottime_reg == ar->fw_coverage.reg_slottime_conf &&  in ath10k_hw_qca988x_set_coverage_class()
638 	    timeout_reg == ar->fw_coverage.reg_ack_cts_timeout_conf &&  in ath10k_hw_qca988x_set_coverage_class()
639 	    phyclk_reg == ar->fw_coverage.reg_phyclk)  in ath10k_hw_qca988x_set_coverage_class()
643 	if (slottime_reg != ar->fw_coverage.reg_slottime_conf)  in ath10k_hw_qca988x_set_coverage_class()
644 		ar->fw_coverage.reg_slottime_orig = slottime_reg;  in ath10k_hw_qca988x_set_coverage_class()
645 	if (timeout_reg != ar->fw_coverage.reg_ack_cts_timeout_conf)  in ath10k_hw_qca988x_set_coverage_class()
646 		ar->fw_coverage.reg_ack_cts_timeout_orig = timeout_reg;  in ath10k_hw_qca988x_set_coverage_class()
647 	ar->fw_coverage.reg_phyclk = phyclk_reg;  in ath10k_hw_qca988x_set_coverage_class()
650 	slottime_reg = ar->fw_coverage.reg_slottime_orig;  in ath10k_hw_qca988x_set_coverage_class()
651 	timeout_reg = ar->fw_coverage.reg_ack_cts_timeout_orig;  in ath10k_hw_qca988x_set_coverage_class()
720 	spin_lock_bh(&ar->data_lock);  in ath10k_hw_qca988x_set_coverage_class()
721 	ar->fw_coverage.coverage_class = value;  in ath10k_hw_qca988x_set_coverage_class()
722 	spin_unlock_bh(&ar->data_lock);  in ath10k_hw_qca988x_set_coverage_class()
724 	ar->fw_coverage.reg_slottime_conf = slottime_reg;  in ath10k_hw_qca988x_set_coverage_class()
725 	ar->fw_coverage.reg_ack_cts_timeout_conf = timeout_reg;  in ath10k_hw_qca988x_set_coverage_class()
728 	mutex_unlock(&ar->conf_mutex);  in ath10k_hw_qca988x_set_coverage_class()
732  * ath10k_hw_qca6174_enable_pll_clock() - enable the qca6174 hw pll clock
751 	hw = &ar->hw_params;  in ath10k_hw_qca6174_enable_pll_clock()
753 	if (ar->regs->core_clk_div_address == 0 ||  in ath10k_hw_qca6174_enable_pll_clock()
754 	    ar->regs->cpu_pll_init_address == 0 ||  in ath10k_hw_qca6174_enable_pll_clock()
755 	    ar->regs->cpu_speed_address == 0)  in ath10k_hw_qca6174_enable_pll_clock()
756 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
758 	clk_div_addr = ar->regs->core_clk_div_address;  in ath10k_hw_qca6174_enable_pll_clock()
759 	pll_init_addr = ar->regs->cpu_pll_init_address;  in ath10k_hw_qca6174_enable_pll_clock()
760 	speed_addr = ar->regs->cpu_speed_address;  in ath10k_hw_qca6174_enable_pll_clock()
766 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
770 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
772 	hw_clk = &hw->hw_clk[MS(reg_val, EFUSE_XTAL_SEL)];  in ath10k_hw_qca6174_enable_pll_clock()
778 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
781 	reg_val |= (SM(hw_clk->rnfrac, BB_PLL_CONFIG_FRAC) |  in ath10k_hw_qca6174_enable_pll_clock()
782 		    SM(hw_clk->outdiv, BB_PLL_CONFIG_OUTDIV));  in ath10k_hw_qca6174_enable_pll_clock()
785 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
791 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
794 	reg_val |= SM(hw_clk->settle_time, WLAN_PLL_SETTLE_TIME);  in ath10k_hw_qca6174_enable_pll_clock()
797 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
803 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
809 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
820 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
826 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
828 	reg_val |= (SM(hw_clk->refdiv, WLAN_PLL_CONTROL_REFDIV) |  in ath10k_hw_qca6174_enable_pll_clock()
829 		    SM(hw_clk->div, WLAN_PLL_CONTROL_DIV) |  in ath10k_hw_qca6174_enable_pll_clock()
833 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
841 			return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
846 		wait_limit--;  in ath10k_hw_qca6174_enable_pll_clock()
852 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
858 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
864 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
872 			return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
877 		wait_limit--;  in ath10k_hw_qca6174_enable_pll_clock()
883 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
889 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
895 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
901 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
906 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
917 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
921 	ret = ath10k_bmi_write_memory(ar, speed_addr, &hw->target_cpu_freq,  in ath10k_hw_qca6174_enable_pll_clock()
923 	ret = ath10k_bmi_write_memory(ar, speed_addr, (u8 *)&hw->target_cpu_freq,  in ath10k_hw_qca6174_enable_pll_clock()
925 				      sizeof(hw->target_cpu_freq));  in ath10k_hw_qca6174_enable_pll_clock()
927 		return -EINVAL;  in ath10k_hw_qca6174_enable_pll_clock()
966 		size = REGION_ACCESS_SIZE_LIMIT - addr;  in ath10k_hw_diag_segment_msb_download()
967 		remain_size = length - size;  in ath10k_hw_diag_segment_msb_download()
1033 	struct bmi_segmented_file_header *hdr;  in ath10k_hw_diag_fast_download()  local
1036 	const struct bmi_segmented_file_header *hdr;  in ath10k_hw_diag_fast_download()  local
1041 	if (length < sizeof(*hdr))  in ath10k_hw_diag_fast_download()
1042 		return -EINVAL;  in ath10k_hw_diag_fast_download()
1048 	hdr = (struct bmi_segmented_file_header *)buf;  in ath10k_hw_diag_fast_download()
1050 	hdr = (const struct bmi_segmented_file_header *)buf;  in ath10k_hw_diag_fast_download()
1052 	if (__le32_to_cpu(hdr->magic_num) != BMI_SGMTFILE_MAGIC_NUM) {  in ath10k_hw_diag_fast_download()
1055 			   hdr->magic_num);  in ath10k_hw_diag_fast_download()
1056 		return -EINVAL;  in ath10k_hw_diag_fast_download()
1059 	if (hdr->file_flags != 0) {  in ath10k_hw_diag_fast_download()
1062 			   hdr->file_flags);  in ath10k_hw_diag_fast_download()
1063 		return -EINVAL;  in ath10k_hw_diag_fast_download()
1067 	metadata = (struct bmi_segmented_metadata *)hdr->data;  in ath10k_hw_diag_fast_download()
1069 	metadata = (const struct bmi_segmented_metadata *)hdr->data;  in ath10k_hw_diag_fast_download()
1071 	left = length - sizeof(*hdr);  in ath10k_hw_diag_fast_download()
1077 			ret = -EINVAL;  in ath10k_hw_diag_fast_download()
1080 		base_addr = __le32_to_cpu(metadata->addr);  in ath10k_hw_diag_fast_download()
1081 		base_len = __le32_to_cpu(metadata->length);  in ath10k_hw_diag_fast_download()
1082 		buf = metadata->data;  in ath10k_hw_diag_fast_download()
1083 		left -= sizeof(*metadata);  in ath10k_hw_diag_fast_download()
1102 			ret = -EINVAL;  in ath10k_hw_diag_fast_download()
1110 				ret = -EINVAL;  in ath10k_hw_diag_fast_download()
1134 		left -= base_len;  in ath10k_hw_diag_fast_download()
1145 	return (resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_DATA_RSSI);  in ath10k_htt_tx_rssi_enable()
1150 	return (resp->data_tx_completion.flags2 &  in ath10k_htt_tx_rssi_enable_wcn3990()
1159 	if (resp->data_tx_completion.flags2 & HTT_TX_DATA_APPEND_RETRIES)  in ath10k_get_htt_tx_data_rssi_pad()
1163 	if (resp->data_tx_completion.flags2 & HTT_TX_DATA_APPEND_TIMESTAMP)  in ath10k_get_htt_tx_data_rssi_pad()