Lines Matching +full:hdr +full:- +full:engine
1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
31 /* bits 5-23 currently reserved */
36 enum htt_h2t_msg_type { /* host-to-target */
59 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)];
76 * but the host shall use the bit-mast + bit-shift defs, to be endian-
178 * htt_data_tx_desc - used for data tx path
181 * ext_tid: for qos-data frames (0-15), see %HTT_DATA_TX_EXT_TID_
202 u8 prefetch[0]; /* start of frame, for FW classification engine */
218 u8 prefetch[0]; /* start of frame, for FW classification engine */
243 #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
244 #define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1)
247 /* the following offsets are in 4-byte units */
263 __le16 rx_ring_len; /* in 4-byte words */
264 __le16 rx_ring_bufsize; /* rx skb size - in bytes */
274 __le16 rx_ring_len; /* in 4-byte words */
275 __le16 rx_ring_bufsize; /* rx skb size - in bytes */
288 struct htt_rx_ring_setup_hdr hdr; member
293 struct htt_rx_ring_setup_hdr hdr; member
298 * htt_stats_req - request target to send specified statistics
302 * so make sure its little-endian.
304 * so make sure its little-endian.
307 * @cookie_lsb: used for confirmation message from target->host
328 * htt_oob_sync_req - request out-of-band sync
331 * HTT host-to-target messages until some other target agent locally
336 * This allows other host-target components to synchronize their operation
343 * The HTT target FW will suspend its host->target message processing as long
344 * as 0 < (in-band sync counter - out-of-band sync counter) & 0xff < 128.
370 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)];
375 u8 hdr[HTT_MGMT_FRM_HDR_DOWNLOAD_LEN]; member
387 /*=== target -> host messages ===============================================*/
534 * htt_resp_hdr - header for target-to-host messages
546 /* htt_ver_resp - response sent for htt_ver_req */
687 /* Non-data in promiscuous mode */
716 struct htt_rx_indication_hdr hdr; member
737 struct htt_rx_indication_hdr hdr; member
767 ptr += sizeof(rx_ind->hdr) in htt_rx_ind_get_mpdu_ranges()
768 + sizeof(rx_ind->ppdu) in htt_rx_ind_get_mpdu_ranges()
769 + sizeof(rx_ind->prefix) in htt_rx_ind_get_mpdu_ranges()
770 + roundup(__le16_to_cpu(rx_ind->prefix.fw_rx_desc_bytes), 4); in htt_rx_ind_get_mpdu_ranges()
787 ptr += sizeof(rx_ind->hdr) in htt_rx_ind_get_mpdu_ranges_hl()
788 + sizeof(rx_ind->ppdu) in htt_rx_ind_get_mpdu_ranges_hl()
789 + sizeof(rx_ind->prefix) in htt_rx_ind_get_mpdu_ranges_hl()
790 + sizeof(rx_ind->fw_desc); in htt_rx_ind_get_mpdu_ranges_hl()
804 * htt_rx_flush - discard or reorder given range of mpdus
807 * [seq_num_start, seq_num_end-1] are valid.
929 * @brief target -> host TX completion indication message definition
936 * |-------------------------------------------------------------|
938 * |-------------------------------------------------------------|
940 * |-------------------------------------------------------------|
942 * |-------------------------------------------------------------|
944 * |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
946 * |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
948 * |-------------------------------------------------------------|
950 * |- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -|
951 * -msg_type
954 * -status
958 * -tid
963 * -tid_invalid
967 * -num
971 * -A0 = append
976 * -A1 = append1
981 * -TP = MSDU tx power presence
985 * The order of the per-MSDU tx power reports matches the order
988 * -A2 = append2
991 * TX_COMP_IND message. The order of the per-MSDU ACK RSSI report
1028 u32 hdr; member
1036 u32 num_enqued; /* 1 for non-AMPDU */
1145 * target -> host test message definition
1149 * The message consists of a 4-octet header, followed by a variable
1150 * number of 32-bit integer values, followed by a variable number
1151 * of 8-bit character values.
1154 * |-----------------------------------------------------------|
1156 * |-----------------------------------------------------------|
1158 * |-----------------------------------------------------------|
1160 * |-----------------------------------------------------------|
1162 * |-----------------------------------------------------------|
1164 * |-----------------------------------------------------------|
1166 * |-----------------------------------------------------------|
1167 * - MSG_TYPE
1171 * - NUM_INTS
1173 * Purpose: indicate how many 32-bit integers follow the message header
1174 * - NUM_CHARS
1176 * Purpose: indicate how many 8-bit characters follow the series of integers
1191 return (__le32 *)rx_test->payload; in htt_rx_test_get_ints()
1196 return rx_test->payload + (rx_test->num_ints * sizeof(__le32)); in htt_rx_test_get_chars()
1200 * target -> host packet log message
1204 * The message consists of a 4-octet header,followed by a variable number
1205 * of 32-bit character values.
1208 * |-----------------------------------------------------------|
1210 * |-----------------------------------------------------------|
1212 * |-----------------------------------------------------------|
1213 * - MSG_TYPE
1227 /* MPDUs received in-order */
1242 /* MPDUs dropped due to monitor mode non-data packet */
1335 /* Cnts any change in ring routing mid-ppdu */
1341 /* Extra frags on rings 0-3 */
1364 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1390 * htt_dbg_stats_status -
1391 * present - The requested stats have been delivered in full.
1396 * partial - The requested stats have been delivered in part.
1400 * error - The requested stats could not be delivered, for example due
1403 * invalid - The requested stat type is either not recognized, or the
1405 * - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1406 * series_done - This special value indicates that no further stats info
1419 * host -> target FRAG DESCRIPTOR/MSDU_EXT DESC bank
1435 * |------------------------------------------------------------|
1437 * |------------------------------------------------------------|
1439 * |------------------------------------------------------------|
1441 * |------------------------------------------------------------|
1443 * |------------------------------------------------------------|
1445 * |------------------------------------------------------------|
1447 * |------------------------------------------------------------|
1449 * |------------------------------------------------------------|
1451 * - MSG_TYPE
1454 * - BANKx_BASE_ADDRESS
1458 * - BANKx_MIN_ID
1462 * - BANKx_MAX_ID
1496 * htt_q_state_conf - part of htt_frag_desc_bank_cfg for host q state config
1501 * however firmware (at least 10.4.3-00191) ignores this host
1540 * htt_q_state - shared between host and firmware via DMA
1544 * performance. This is most notably used for MU-MIMO aggregation when multiple
1593 return (void *)&ind->records[le16_to_cpu(ind->num_records)]; in ath10k_htt_get_tx_fetch_ind_resp_ids()
1691 /* WEP: 24-bit PN */
1694 /* TKIP or CCMP: 48-bit PN */
1697 /* WAPI: 128-bit PN */
1702 struct htt_cmd_hdr hdr; member
1720 struct htt_resp_hdr hdr; member
1804 * Ring of network buffer objects - This ring is
1819 * pointing to specific (re-ordered) buffers.
1828 * Ring of buffer addresses -
1847 /* size - 1 */
1857 * alloc_idx - where HTT SW has deposited empty buffers
1873 * refill_retry_timer - timer triggered when the ring is
1892 /* FIFO for storing tx done status {ack, no-ack, discard} and msdu id */
1895 /* set if host-fw communication goes haywire
1966 if (!htt->tx_ops->htt_send_rx_ring_cfg) in ath10k_htt_send_rx_ring_cfg()
1967 return -EOPNOTSUPP; in ath10k_htt_send_rx_ring_cfg()
1969 return htt->tx_ops->htt_send_rx_ring_cfg(htt); in ath10k_htt_send_rx_ring_cfg()
1974 if (!htt->tx_ops->htt_send_frag_desc_bank_cfg) in ath10k_htt_send_frag_desc_bank_cfg()
1975 return -EOPNOTSUPP; in ath10k_htt_send_frag_desc_bank_cfg()
1977 return htt->tx_ops->htt_send_frag_desc_bank_cfg(htt); in ath10k_htt_send_frag_desc_bank_cfg()
1982 if (!htt->tx_ops->htt_alloc_frag_desc) in ath10k_htt_alloc_frag_desc()
1983 return -EOPNOTSUPP; in ath10k_htt_alloc_frag_desc()
1985 return htt->tx_ops->htt_alloc_frag_desc(htt); in ath10k_htt_alloc_frag_desc()
1990 if (htt->tx_ops->htt_free_frag_desc) in ath10k_htt_free_frag_desc()
1991 htt->tx_ops->htt_free_frag_desc(htt); in ath10k_htt_free_frag_desc()
1998 return htt->tx_ops->htt_tx(htt, txmode, msdu); in ath10k_htt_tx()
2003 if (htt->tx_ops->htt_flush_tx) in ath10k_htt_flush_tx()
2004 htt->tx_ops->htt_flush_tx(htt); in ath10k_htt_flush_tx()
2009 if (!htt->tx_ops->htt_alloc_txbuff) in ath10k_htt_alloc_txbuff()
2010 return -EOPNOTSUPP; in ath10k_htt_alloc_txbuff()
2012 return htt->tx_ops->htt_alloc_txbuff(htt); in ath10k_htt_alloc_txbuff()
2017 if (htt->tx_ops->htt_free_txbuff) in ath10k_htt_free_txbuff()
2018 htt->tx_ops->htt_free_txbuff(htt); in ath10k_htt_free_txbuff()
2026 if (!htt->tx_ops->htt_h2t_aggr_cfg_msg) in ath10k_htt_h2t_aggr_cfg_msg()
2027 return -EOPNOTSUPP; in ath10k_htt_h2t_aggr_cfg_msg()
2029 return htt->tx_ops->htt_h2t_aggr_cfg_msg(htt, in ath10k_htt_h2t_aggr_cfg_msg()
2048 if (!htt->rx_ops->htt_get_rx_ring_size) in ath10k_htt_get_rx_ring_size()
2051 return htt->rx_ops->htt_get_rx_ring_size(htt); in ath10k_htt_get_rx_ring_size()
2057 if (htt->rx_ops->htt_config_paddrs_ring) in ath10k_htt_config_paddrs_ring()
2058 htt->rx_ops->htt_config_paddrs_ring(htt, vaddr); in ath10k_htt_config_paddrs_ring()
2065 if (htt->rx_ops->htt_set_paddrs_ring) in ath10k_htt_set_paddrs_ring()
2066 htt->rx_ops->htt_set_paddrs_ring(htt, paddr, idx); in ath10k_htt_set_paddrs_ring()
2071 if (!htt->rx_ops->htt_get_vaddr_ring) in ath10k_htt_get_vaddr_ring()
2074 return htt->rx_ops->htt_get_vaddr_ring(htt); in ath10k_htt_get_vaddr_ring()
2079 if (htt->rx_ops->htt_reset_paddrs_ring) in ath10k_htt_reset_paddrs_ring()
2080 htt->rx_ops->htt_reset_paddrs_ring(htt, idx); in ath10k_htt_reset_paddrs_ring()
2087 if (!htt->rx_ops->htt_rx_proc_rx_frag_ind) in ath10k_htt_rx_proc_rx_frag_ind()
2090 return htt->rx_ops->htt_rx_proc_rx_frag_ind(htt, rx, skb); in ath10k_htt_rx_proc_rx_frag_ind()
2203 if (hw->rx_desc_ops->rx_desc_get_l3_pad_bytes) in ath10k_htt_rx_desc_get_l3_pad_bytes()
2204 return hw->rx_desc_ops->rx_desc_get_l3_pad_bytes(rxd); in ath10k_htt_rx_desc_get_l3_pad_bytes()
2211 if (hw->rx_desc_ops->rx_desc_get_msdu_limit_error) in ath10k_htt_rx_desc_msdu_limit_error()
2212 return hw->rx_desc_ops->rx_desc_get_msdu_limit_error(rxd); in ath10k_htt_rx_desc_msdu_limit_error()
2225 if (hw->rx_desc_ops->rx_desc_from_raw_buffer) in ath10k_htt_rx_desc_from_raw_buffer()
2226 return hw->rx_desc_ops->rx_desc_from_raw_buffer(buff); in ath10k_htt_rx_desc_from_raw_buffer()
2227 return &((struct htt_rx_desc_v1 *)buff)->base; in ath10k_htt_rx_desc_from_raw_buffer()
2234 if (hw->rx_desc_ops->rx_desc_get_offsets) { in ath10k_htt_rx_desc_get_offsets()
2235 hw->rx_desc_ops->rx_desc_get_offsets(off); in ath10k_htt_rx_desc_get_offsets()
2238 off->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status)); in ath10k_htt_rx_desc_get_offsets()
2239 off->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload)); in ath10k_htt_rx_desc_get_offsets()
2240 off->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start)); in ath10k_htt_rx_desc_get_offsets()
2241 off->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end)); in ath10k_htt_rx_desc_get_offsets()
2242 off->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start)); in ath10k_htt_rx_desc_get_offsets()
2243 off->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end)); in ath10k_htt_rx_desc_get_offsets()
2244 off->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start)); in ath10k_htt_rx_desc_get_offsets()
2245 off->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end)); in ath10k_htt_rx_desc_get_offsets()
2246 off->rx_attention_offset = __cpu_to_le16(desc_offset(attention)); in ath10k_htt_rx_desc_get_offsets()
2247 off->frag_info_offset = __cpu_to_le16(desc_offset(frag_info)); in ath10k_htt_rx_desc_get_offsets()
2257 if (hw->rx_desc_ops->rx_desc_get_attention) in ath10k_htt_rx_desc_get_attention()
2258 return hw->rx_desc_ops->rx_desc_get_attention(rxd); in ath10k_htt_rx_desc_get_attention()
2261 return &rx_desc->attention; in ath10k_htt_rx_desc_get_attention()
2269 if (hw->rx_desc_ops->rx_desc_get_frag_info) in ath10k_htt_rx_desc_get_frag_info()
2270 return hw->rx_desc_ops->rx_desc_get_frag_info(rxd); in ath10k_htt_rx_desc_get_frag_info()
2273 return &rx_desc->frag_info.common; in ath10k_htt_rx_desc_get_frag_info()
2281 if (hw->rx_desc_ops->rx_desc_get_mpdu_start) in ath10k_htt_rx_desc_get_mpdu_start()
2282 return hw->rx_desc_ops->rx_desc_get_mpdu_start(rxd); in ath10k_htt_rx_desc_get_mpdu_start()
2285 return &rx_desc->mpdu_start; in ath10k_htt_rx_desc_get_mpdu_start()
2293 if (hw->rx_desc_ops->rx_desc_get_mpdu_end) in ath10k_htt_rx_desc_get_mpdu_end()
2294 return hw->rx_desc_ops->rx_desc_get_mpdu_end(rxd); in ath10k_htt_rx_desc_get_mpdu_end()
2297 return &rx_desc->mpdu_end; in ath10k_htt_rx_desc_get_mpdu_end()
2305 if (hw->rx_desc_ops->rx_desc_get_msdu_start) in ath10k_htt_rx_desc_get_msdu_start()
2306 return hw->rx_desc_ops->rx_desc_get_msdu_start(rxd); in ath10k_htt_rx_desc_get_msdu_start()
2309 return &rx_desc->msdu_start.common; in ath10k_htt_rx_desc_get_msdu_start()
2317 if (hw->rx_desc_ops->rx_desc_get_msdu_end) in ath10k_htt_rx_desc_get_msdu_end()
2318 return hw->rx_desc_ops->rx_desc_get_msdu_end(rxd); in ath10k_htt_rx_desc_get_msdu_end()
2321 return &rx_desc->msdu_end.common; in ath10k_htt_rx_desc_get_msdu_end()
2329 if (hw->rx_desc_ops->rx_desc_get_ppdu_start) in ath10k_htt_rx_desc_get_ppdu_start()
2330 return hw->rx_desc_ops->rx_desc_get_ppdu_start(rxd); in ath10k_htt_rx_desc_get_ppdu_start()
2333 return &rx_desc->ppdu_start; in ath10k_htt_rx_desc_get_ppdu_start()
2341 if (hw->rx_desc_ops->rx_desc_get_ppdu_end) in ath10k_htt_rx_desc_get_ppdu_end()
2342 return hw->rx_desc_ops->rx_desc_get_ppdu_end(rxd); in ath10k_htt_rx_desc_get_ppdu_end()
2345 return &rx_desc->ppdu_end.common; in ath10k_htt_rx_desc_get_ppdu_end()
2353 if (hw->rx_desc_ops->rx_desc_get_rx_hdr_status) in ath10k_htt_rx_desc_get_rx_hdr_status()
2354 return hw->rx_desc_ops->rx_desc_get_rx_hdr_status(rxd); in ath10k_htt_rx_desc_get_rx_hdr_status()
2357 return rx_desc->rx_hdr_status; in ath10k_htt_rx_desc_get_rx_hdr_status()
2365 if (hw->rx_desc_ops->rx_desc_get_msdu_payload) in ath10k_htt_rx_desc_get_msdu_payload()
2366 return hw->rx_desc_ops->rx_desc_get_msdu_payload(rxd); in ath10k_htt_rx_desc_get_msdu_payload()
2369 return rx_desc->msdu_payload; in ath10k_htt_rx_desc_get_msdu_payload()
2411 return HTT_RX_BUF_SIZE - (int)hw->rx_desc_ops->rx_desc_size; in ath10k_htt_rx_msdu_size()
2425 #define HTT_MAX_CACHE_LINE_SIZE_MASK ((1 << HTT_LOG2_MAX_CACHE_LINE_SIZE) - 1)