Lines Matching full:cbr
264 #define AR_ISR_QCBROVF 0x02000000 // QCU CBR overflow interrupt
265 #define AR_ISR_QCBRURN 0x04000000 // QCU CBR underrun interrupt
346 #define AR_IMR_QCBROVF 0x02000000 // QCU CBR overflow interrupt
347 #define AR_IMR_QCBRURN 0x04000000 // QCU CBR underrun interrupt
480 /* MAC CBR configuration */
483 #define AR_Q_CBRCFG_INTERVAL 0x00FFFFFF // Mask for CBR interval (us)
484 #define AR_Q_CBRCFG_INTERVAL_S 0 // Shift for CBR interval (us)
485 #define AR_Q_CBRCFG_OVF_THRESH 0xFF000000 // Mask for CBR overflow threshold
486 #define AR_Q_CBRCFG_OVF_THRESH_S 24 // Shift for CBR overflow threshold
511 #define AR_Q_MISC_FSP_CBR 1 // CBR
517 #define AR_Q_MISC_CBR_INCR_DIS1 0x00000020 // Disable CBR expired counter incr (empty q)
518 #define AR_Q_MISC_CBR_INCR_DIS0 0x00000040 // Disable CBR expired counter incr (empty bea…
520 #define AR_Q_MISC_CBR_EXP_CNTR_LIMIT_EN 0x00000100 // CBR expired counter limit enable
522 #define AR_Q_MISC_RESET_CBR_EXP_CTR 0x00000400 // Reset CBR expired counter
531 #define AR_Q_STS_CBR_EXP_CNT 0x0000FF00 // Mask for CBR expired counter