Lines Matching full:udma

348  * change and wait udma state
350 * @param dma the udma to change its state
565 al_dbg("eth [%s]: initialize controller's UDMA. id = %d\n", params->name, params->udma_id); in al_eth_adapter_init()
566 al_dbg("eth [%s]: UDMA base regs: %p\n", params->name, params->udma_regs_base); in al_eth_adapter_init()
584 /* initialize Tx udma */ in al_eth_adapter_init()
602 /* initialize Rx udma */ in al_eth_adapter_init()
621 al_dbg("eth [%s]: controller's UDMA successfully initialized\n", in al_eth_adapter_init()
641 /* if pointer to ec regs provided, then init the tx meta cache of this udma*/ in al_eth_adapter_init()
652 // only udma 0 allowed to init ec in al_eth_adapter_init()
723 // only udma 0 allowed to init ec in al_eth_ec_mac_ints_config()
770 // only udma 0 allowed to init ec in al_eth_ec_mac_isr()
808 al_dbg("eth [%s]: stop controller's UDMA\n", adapter->name); in al_eth_adapter_stop()
818 al_dbg("eth [%s]: controller's TX UDMA stopped\n", in al_eth_adapter_stop()
828 al_dbg("eth [%s]: controller's RX UDMA stopped\n", in al_eth_adapter_stop()
835 al_dbg("eth [%s]: reset controller's UDMA\n", adapter->name); in al_eth_adapter_reset()
847 struct al_udma *udma; in al_eth_queue_config() local
850 al_dbg("eth [%s]: config UDMA %s queue %d\n", adapter->name, in al_eth_queue_config()
854 udma = &adapter->tx_udma; in al_eth_queue_config()
856 udma = &adapter->rx_udma; in al_eth_queue_config()
861 rc = al_udma_q_init(udma, qid, q_params); in al_eth_queue_config()
867 rc = al_udma_s2m_q_compl_coal_config(&udma->udma_q[qid], in al_eth_queue_config()
2299 al_dbg("[%s %d]: flags: %s %s %s %s %s %s\n", tx_dma_q->udma->name, tx_dma_q->qid, in al_dump_tx_pkt()
2339 tx_dma_q->udma->name, tx_dma_q->qid, pkt->l3_proto_idx, in al_dump_tx_pkt()
2350 tx_dma_q->udma->name, tx_dma_q->qid, in al_dump_tx_pkt()
2354 , tx_dma_q->udma->name, tx_dma_q->qid, store, in al_dump_tx_pkt()
2362 al_dbg("[%s %d]: num of bufs: %d\n", tx_dma_q->udma->name, tx_dma_q->qid, in al_dump_tx_pkt()
2365 …al_dbg("eth [%s %d]: buf[%d]: len 0x%08x. address 0x%016llx\n", tx_dma_q->udma->name, tx_dma_q->qi… in al_dump_tx_pkt()
2369 al_dbg("[%s %d]: total len: 0x%08x\n", tx_dma_q->udma->name, tx_dma_q->qid, total_len); in al_dump_tx_pkt()
2389 al_dbg("[%s %d]: new tx pkt\n", tx_dma_q->udma->name, tx_dma_q->qid); in al_eth_tx_pkt_prepare()
2402 tx_dma_q->udma->name, tx_dma_q->qid, tx_descs, in al_eth_tx_pkt_prepare()
2409 tx_dma_q->udma->name, tx_dma_q->qid, tx_descs); in al_eth_tx_pkt_prepare()
2564 tx_dma_q->udma->name, tx_dma_q->qid, tx_descs); in al_eth_tx_pkt_prepare()
2587 tx_dma_q->udma->name, tx_dma_q->qid, rc); in al_eth_comp_tx_get()
2685 * enable / disable header split in the udma queue.
2686 * length will be taken from the udma configuration to enable different length per queue.
2712 al_dbg("[%s %d]: add rx buffer.\n", rx_dma_q->udma->name, rx_dma_q->qid); in al_eth_rx_buffer_add()
2717 rx_dma_q->udma->name, rx_dma_q->qid); in al_eth_rx_buffer_add()
2728 al_assert((rx_dma_q->udma->rev_id >= AL_UDMA_REV_ID_2) || in al_eth_rx_buffer_add()
2747 rx_dma_q->udma->name, rx_dma_q->qid, descs_num); in al_eth_rx_buffer_action()
2771 rx_dma_q->udma->name, rx_dma_q->qid); in al_eth_pkt_rx()
2829 int al_eth_thash_table_set(struct al_hal_eth_adapter *adapter, uint32_t idx, uint8_t udma, uint32_t… in al_eth_thash_table_set() argument
2834 entry = (udma << AL_ETH_THASH_UDMA_SHIFT) & AL_ETH_THASH_UDMA_MASK; in al_eth_thash_table_set()
3136 /** Configure default UDMA register */
3262 AL_REG_FIELD_SET(reg, EC_RFW_DEFAULT_OR_UDMA_MASK, EC_RFW_DEFAULT_OR_UDMA_SHIFT, params->udma); in al_eth_filter_override_config()
3343 /* Tx path UDMA, unmask pause_on for all queues */ in al_eth_flow_control_config()
3350 /* Rx path UDMA, enable generating xoff from UDMA queue almost full indication */ in al_eth_flow_control_config()
3364 /* Tx path UDMA, unmask pause_on for all queues */ in al_eth_flow_control_config()
3462 al_dbg("[%s]: config vlan modification registers. udma id %d.\n", adapter->name, udma_id); in al_eth_vlan_mod_config()