212 			enum al_eth_an_lt_lane lane)  in al_eth_an_lt_reg_read()  argument
218 		al_assert(lane == AL_ETH_AN__LT_LANE_0);  in al_eth_an_lt_reg_read()
233 		switch (lane) {  in al_eth_an_lt_reg_read()
275 			al_err("%s: Unknown Lane %d\n", __func__, lane);  in al_eth_an_lt_reg_read()
281 	al_dbg("[%s]: %s - (%s) lane %d, reg %d, val 0x%x", adapter->name, __func__,  in al_eth_an_lt_reg_read()
282 	       (an_lt == AL_ETH_AN_REGS) ? "AN" : "LT", lane, reg_addr, val);  in al_eth_an_lt_reg_read()
291 			enum al_eth_an_lt_lane lane,  in al_eth_an_lt_reg_write()  argument
310 		switch (lane) {  in al_eth_an_lt_reg_write()
356 			al_err("%s: Unknown Lane %d\n", __func__, lane);  in al_eth_an_lt_reg_write()
362 	al_dbg("[%s]: %s - (%s) lane %d, reg %d, val 0x%x", adapter->name, __func__,  in al_eth_an_lt_reg_write()
363 	       (an_lt == AL_ETH_AN_REGS) ? "AN" : "LT", lane, reg_addr, val);  in al_eth_an_lt_reg_write()
499 			enum al_eth_an_lt_lane lane,  in al_eth_lp_coeff_up_get()  argument
504 	reg = al_eth_an_lt_reg_read(adapter, AL_ETH_KR_PMD_LP_COEF_UP, AL_ETH_LT_REGS, lane);  in al_eth_lp_coeff_up_get()
529 			enum al_eth_an_lt_lane lane,  in al_eth_lp_status_report_get()  argument
534 	reg = al_eth_an_lt_reg_read(adapter, AL_ETH_KR_PMD_LP_STATUS_REPORT, AL_ETH_LT_REGS, lane);  in al_eth_lp_status_report_get()
556 			enum al_eth_an_lt_lane lane,  in al_eth_ld_coeff_up_set()  argument
582 	al_eth_an_lt_reg_write(adapter, AL_ETH_KR_PMD_LD_COEF_UP, AL_ETH_LT_REGS, lane, reg);  in al_eth_ld_coeff_up_set()
587 			enum al_eth_an_lt_lane lane,  in al_eth_ld_status_report_set()  argument
611 	al_eth_an_lt_reg_write(adapter, AL_ETH_KR_PMD_LD_STATUS_REPORT, AL_ETH_LT_REGS, lane, reg);  in al_eth_ld_status_report_set()
615 					  enum al_eth_an_lt_lane lane)  in al_eth_kr_receiver_frame_lock_get()  argument
619 	reg = al_eth_an_lt_reg_read(adapter, AL_ETH_KR_PMD_STATUS, AL_ETH_LT_REGS, lane);  in al_eth_kr_receiver_frame_lock_get()
626 					 enum al_eth_an_lt_lane lane)  in al_eth_kr_startup_proto_prog_get()  argument
630 	reg = al_eth_an_lt_reg_read(adapter, AL_ETH_KR_PMD_STATUS, AL_ETH_LT_REGS, lane);  in al_eth_kr_startup_proto_prog_get()
637 					   enum al_eth_an_lt_lane lane)  in al_eth_kr_training_status_fail_get()  argument
641 	reg = al_eth_an_lt_reg_read(adapter, AL_ETH_KR_PMD_STATUS, AL_ETH_LT_REGS, lane);  in al_eth_kr_training_status_fail_get()
647 			       enum al_eth_an_lt_lane lane)  in al_eth_receiver_ready_set()  argument
649 	al_eth_an_lt_reg_write(adapter, AL_ETH_KR_PMD_STATUS, AL_ETH_LT_REGS, lane, 1);  in al_eth_receiver_ready_set()
898 		       enum al_eth_an_lt_lane lane,  in al_eth_kr_an_start()  argument
908 			       lane, AL_BIT(AL_ETH_KR_PMD_CONTROL_RESTART));  in al_eth_kr_an_start()
914 			       lane, control);  in al_eth_kr_an_start()
917 		al_eth_kr_lt_initialize(adapter, lane);  in al_eth_kr_an_start()
961 			  enum al_eth_an_lt_lane lane)  in al_eth_kr_lt_restart()  argument
966 			       lane, (AL_BIT(AL_ETH_KR_PMD_CONTROL_ENABLE) |  in al_eth_kr_lt_restart()
971 		       enum al_eth_an_lt_lane lane)  in al_eth_kr_lt_stop()  argument
976 			       lane, AL_BIT(AL_ETH_KR_PMD_CONTROL_RESTART));  in al_eth_kr_lt_stop()
980 			     enum al_eth_an_lt_lane lane)  in al_eth_kr_lt_initialize()  argument
985 	al_eth_kr_lt_stop(adapter, lane);  in al_eth_kr_lt_initialize()
988 	al_eth_an_lt_reg_write(adapter, AL_ETH_KR_PMD_STATUS, AL_ETH_LT_REGS, lane, 0);  in al_eth_kr_lt_initialize()
991 	al_eth_an_lt_reg_write(adapter, AL_ETH_KR_PMD_LD_COEF_UP, AL_ETH_LT_REGS, lane, 0);  in al_eth_kr_lt_initialize()
993 	al_eth_an_lt_reg_write(adapter, AL_ETH_KR_PMD_LD_STATUS_REPORT, AL_ETH_LT_REGS, lane, 0);  in al_eth_kr_lt_initialize()
996 	al_eth_kr_lt_restart(adapter, lane);  in al_eth_kr_lt_initialize()
1000 				     enum al_eth_an_lt_lane lane,  in al_eth_kr_lt_frame_lock_wait()  argument
1007 		reg = al_eth_an_lt_reg_read(adapter, AL_ETH_KR_PMD_STATUS, AL_ETH_LT_REGS, lane);  in al_eth_kr_lt_frame_lock_wait()