Lines Matching full:s2m
40 * @brief C Header file for the UDMA S2M registers
96 * [0xc] S2M DMA error log mask.
98 * This register determines if these errors cause the S2M DMA to log the
127 /* [0x28] S2M stream data FIFO status */
129 /* [0x2c] S2M stream header FIFO status */
131 /* [0x30] S2M AXI data FIFO status */
133 /* [0x34] S2M unack FIFO status */
138 * [0x3c] S2M prefetch FIFO status.
143 * [0x40] S2M completion FIFO status.
147 /* [0x44] S2M state machine and FIFO clear control */
149 /* [0x48] S2M Misc Check enable */
151 /* [0x4c] S2M FIFO enable control, internal */
158 /* [0x0] S2M descriptor prefetch configuration */
160 /* [0x4] S2M descriptor prefetch configuration */
162 /* [0x8] S2M descriptor prefetch configuration */
164 /* [0xc] S2M descriptor prefetch configuration */
215 * [0x0] S2M Feature register
216 * S2M instantiation parameters
219 /* [0x4] Reserved S2M feature register */
222 * [0x8] S2M Feature register
223 * S2M instantiation parameters
227 * [0xc] S2M Feature register.
228 * S2M instantiation parameters.
232 * [0x10] S2M Feature register.
233 * S2M instantiation parameters.
236 /* [0x14] S2M Feature register. S2M instantiation parameters. */
242 /* [0x20] S2M Descriptor ring configuration */
244 /* [0x24] S2M Descriptor ring status and information */
283 /* [0x68] Number of S2M Rx packets after completion */
291 struct udma_s2m s2m; /* [0x200] */ member
572 /* Stop descriptor prefetch when the stream is disabled and the S2M is idle. */
861 * S2M Descriptor Ring Base address [31:4].
862 * Value of the base address of the S2M descriptor ring
919 * S2M Descriptor Ring Base address [31:4].
920 * Value of the base address of the S2M descriptor ring
963 * Determines the position of the buffer 2 length in the S2M completion