Lines Matching +full:layer +full:- +full:primary
1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
56 /* *INDENT-OFF* */
60 /* *INDENT-ON* */
64 * This is the interrupt mode for the primary interrupt level The secondary
66 * interrupt that is reflected in group D of the primary.
69 AL_IOFIC_MODE_LEGACY, /**< level-sensitive interrupt wire */
70 AL_IOFIC_MODE_MSIX_PER_Q, /**< per UDMA queue MSI-X interrupt */
74 /** interrupt controller level (primary/secondary) */
81 * The next four groups represents the standard 4 groups in the primary
82 * interrupt controller of each bus-master unit in the I/O Fabric.
92 * Primary interrupt controller, group A bits
108 * Primary interrupt controller, group D bits
126 * Until this point, all description above is for Groups A/B/C/D in the PRIMARY
131 * GIC directly, rather they are represented in Group D of the primary interrupt
255 * layer (RAID, Ethernet etc)
261 * Application layer (RAID, Ethernet etc)
267 * Application layer (RAID, Ethernet etc)
273 * failure at the Application layer (RAID, Ethernet etc)
286 /** PRE-UNACK packets buffer parity error */
297 * packet length indicating a failure at the Application layer (RAID, Ethernet
307 * indicates a failure at the application layer.
317 * failure at the application layer.
368 * by an error at the application layer which sends packet data without
464 * interrupt and MSIX modes. The m2s/s2m errors/abort are a set of bit-wise
468 * The bit-mask that the _errors_disable and _aborts_disable are described in
472 * @param mode interrupt scheme mode (legacy, MSI-X..)
474 * This is a bit-wise mask, to indicate which one of the error causes in
479 * This is a bit-wise mask, to indicate which one of the error causes in
484 * This is a bit-wise mask, to indicate which one of the error causes in
489 * This is a bit-wise mask, to indicate which one of the error causes in
494 * @return 0 on success. -EINVAL otherwise.
504 * this function can be used when the upper layer wants to directly
508 * @param level the interrupt controller level (primary / secondary)
518 * Get the interrupt controller base address for either the primary or secondary
522 * @param level the interrupt controller level (primary / secondary)
532 (void __iomem *)®s->gen.interrupt_regs.main_iofic : in al_udma_iofic_reg_base_get()
533 (void __iomem *)®s->gen.interrupt_regs.secondary_iofic_ctrl; in al_udma_iofic_reg_base_get()
541 * @param level the interrupt controller level (primary / secondary)
544 * @returns 0 - invalid, 1 - valid
563 * @param level the interrupt controller level (primary / secondary)
583 * @param level the interrupt controller level (primary / secondary)
601 * @param level the interrupt controller level (primary / secondary)
617 * @param level the interrupt controller level (primary / secondary)