Lines Matching refs:iatu
949 al_reg_write32(®s->port_regs->iatu.index, reg); in al_pcie_ecrc_gen_ob_atu_enable()
950 reg = al_reg_read32(®s->port_regs->iatu.cr2); in al_pcie_ecrc_gen_ob_atu_enable()
952 reg = al_reg_read32(®s->port_regs->iatu.cr1); in al_pcie_ecrc_gen_ob_atu_enable()
959 al_reg_write32(®s->port_regs->iatu.cr1, reg); in al_pcie_ecrc_gen_ob_atu_enable()
2435 al_reg_write32(®s->port_regs->iatu.index, reg); in al_pcie_atu_region_set()
2437 al_reg_write32(®s->port_regs->iatu.lower_base_addr, in al_pcie_atu_region_set()
2439 al_reg_write32(®s->port_regs->iatu.upper_base_addr, in al_pcie_atu_region_set()
2441 al_reg_write32(®s->port_regs->iatu.lower_target_addr, in al_pcie_atu_region_set()
2443 al_reg_write32(®s->port_regs->iatu.upper_target_addr, in al_pcie_atu_region_set()
2479 al_reg_write32(®s->port_regs->iatu.limit_addr, in al_pcie_atu_region_set()
2540 al_reg_write32(®s->port_regs->iatu.cr1, reg); in al_pcie_atu_region_set()
2565 al_reg_write32(®s->port_regs->iatu.cr2, reg); in al_pcie_atu_region_set()
2583 al_reg_write32(®s->port_regs->iatu.index, reg); in al_pcie_atu_region_get_fields()
2585 *base_addr = al_reg_read32(®s->port_regs->iatu.lower_base_addr); in al_pcie_atu_region_get_fields()
2586 high_addr = al_reg_read32(®s->port_regs->iatu.upper_base_addr); in al_pcie_atu_region_get_fields()
2590 *target_addr = al_reg_read32(®s->port_regs->iatu.lower_target_addr); in al_pcie_atu_region_get_fields()
2591 high_addr = al_reg_read32(®s->port_regs->iatu.upper_target_addr); in al_pcie_atu_region_get_fields()
2595 reg = al_reg_read32(®s->port_regs->iatu.cr1); in al_pcie_atu_region_get_fields()