231 	al_reg_write32(&regs->app.parity->en_core,  in al_pcie_port_ram_parity_int_config()
234 	al_reg_write32_masked(&regs->app.int_grp_b->mask,  in al_pcie_port_ram_parity_int_config()
471 	info_0 = al_reg_read32(&regs->app.debug->info_0);  in al_pcie_check_link()
794 		al_reg_write32(regs->app.soc_int[pf_num].mask_inta_leg_0, (1 << 21));  in al_pcie_port_pf_params_config()
797 		al_reg_write32(regs->app.soc_int[pf_num].mask_inta_leg_3, (1 << 18));  in al_pcie_port_pf_params_config()
813 	 * Backup the value of the app.int_grp_a.mask_a register, because  in al_pcie_port_pf_params_config()
814 	 * app.int_grp_a.mask_clear_a gets overwritten during the write to  in al_pcie_port_pf_params_config()
815 	 * app.soc.mask_msi_leg_0 register.  in al_pcie_port_pf_params_config()
816 	 * Restore the original value after the write to app.soc.mask_msi_leg_0  in al_pcie_port_pf_params_config()
820 		al_reg_write32(regs->app.soc_int[pf_num].mask_msi_leg_0, (1 << 22));  in al_pcie_port_pf_params_config()
823 		al_reg_write32(regs->app.soc_int[pf_num].mask_msi_leg_3, (1 << 19));  in al_pcie_port_pf_params_config()
860 		al_reg_write32_masked(&regs->app.cfg_func_ext->cfg,  in al_pcie_port_sris_config()
864 		al_reg_write32_masked(regs->app.global_ctrl.sris_kp_counter,  in al_pcie_port_sris_config()
1031 		pcie_port->regs->app.global_ctrl.port_init = &regs->app.global_ctrl.port_init;  in al_pcie_port_handle_init()
1032 		pcie_port->regs->app.global_ctrl.pm_control = &regs->app.global_ctrl.pm_control;  in al_pcie_port_handle_init()
1033 		pcie_port->regs->app.global_ctrl.events_gen[0] = &regs->app.global_ctrl.events_gen;  in al_pcie_port_handle_init()
1034 		pcie_port->regs->app.debug = &regs->app.debug;  in al_pcie_port_handle_init()
1035 		pcie_port->regs->app.soc_int[0].status_0 = &regs->app.soc_int.status_0;  in al_pcie_port_handle_init()
1036 		pcie_port->regs->app.soc_int[0].status_1 = &regs->app.soc_int.status_1;  in al_pcie_port_handle_init()
1037 		pcie_port->regs->app.soc_int[0].status_2 = &regs->app.soc_int.status_2;  in al_pcie_port_handle_init()
1038 		pcie_port->regs->app.soc_int[0].mask_inta_leg_0 = &regs->app.soc_int.mask_inta_leg_0;  in al_pcie_port_handle_init()
1039 		pcie_port->regs->app.soc_int[0].mask_inta_leg_1 = &regs->app.soc_int.mask_inta_leg_1;  in al_pcie_port_handle_init()
1040 		pcie_port->regs->app.soc_int[0].mask_inta_leg_2 = &regs->app.soc_int.mask_inta_leg_2;  in al_pcie_port_handle_init()
1041 		pcie_port->regs->app.soc_int[0].mask_msi_leg_0 = &regs->app.soc_int.mask_msi_leg_0;  in al_pcie_port_handle_init()
1042 		pcie_port->regs->app.soc_int[0].mask_msi_leg_1 = &regs->app.soc_int.mask_msi_leg_1;  in al_pcie_port_handle_init()
1043 		pcie_port->regs->app.soc_int[0].mask_msi_leg_2 = &regs->app.soc_int.mask_msi_leg_2;  in al_pcie_port_handle_init()
1044 		pcie_port->regs->app.ctrl_gen = &regs->app.ctrl_gen;  in al_pcie_port_handle_init()
1045 		pcie_port->regs->app.parity = &regs->app.parity;  in al_pcie_port_handle_init()
1046 		pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair;  in al_pcie_port_handle_init()
1047 		pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair;  in al_pcie_port_handle_init()
1048 		pcie_port->regs->app.int_grp_a = &regs->app.int_grp_a;  in al_pcie_port_handle_init()
1049 		pcie_port->regs->app.int_grp_b = &regs->app.int_grp_b;  in al_pcie_port_handle_init()
1098 		pcie_port->regs->app.global_ctrl.port_init = &regs->app.global_ctrl.port_init;  in al_pcie_port_handle_init()
1099 		pcie_port->regs->app.global_ctrl.pm_control = &regs->app.global_ctrl.pm_control;  in al_pcie_port_handle_init()
1100 		pcie_port->regs->app.global_ctrl.events_gen[0] = &regs->app.global_ctrl.events_gen;  in al_pcie_port_handle_init()
1101 …pcie_port->regs->app.global_ctrl.corr_err_sts_int = &regs->app.global_ctrl.pended_corr_err_sts_int;  in al_pcie_port_handle_init()
1102 …pcie_port->regs->app.global_ctrl.uncorr_err_sts_int = &regs->app.global_ctrl.pended_uncorr_err_sts…  in al_pcie_port_handle_init()
1103 		pcie_port->regs->app.global_ctrl.sris_kp_counter = &regs->app.global_ctrl.sris_kp_counter_value;  in al_pcie_port_handle_init()
1104 		pcie_port->regs->app.debug = &regs->app.debug;  in al_pcie_port_handle_init()
1105 		pcie_port->regs->app.ap_user_send_msg = &regs->app.ap_user_send_msg;  in al_pcie_port_handle_init()
1106 		pcie_port->regs->app.soc_int[0].status_0 = &regs->app.soc_int.status_0;  in al_pcie_port_handle_init()
1107 		pcie_port->regs->app.soc_int[0].status_1 = &regs->app.soc_int.status_1;  in al_pcie_port_handle_init()
1108 		pcie_port->regs->app.soc_int[0].status_2 = &regs->app.soc_int.status_2;  in al_pcie_port_handle_init()
1109 		pcie_port->regs->app.soc_int[0].status_3 = &regs->app.soc_int.status_3;  in al_pcie_port_handle_init()
1110 		pcie_port->regs->app.soc_int[0].mask_inta_leg_0 = &regs->app.soc_int.mask_inta_leg_0;  in al_pcie_port_handle_init()
1111 		pcie_port->regs->app.soc_int[0].mask_inta_leg_1 = &regs->app.soc_int.mask_inta_leg_1;  in al_pcie_port_handle_init()
1112 		pcie_port->regs->app.soc_int[0].mask_inta_leg_2 = &regs->app.soc_int.mask_inta_leg_2;  in al_pcie_port_handle_init()
1113 		pcie_port->regs->app.soc_int[0].mask_inta_leg_3 = &regs->app.soc_int.mask_inta_leg_3;  in al_pcie_port_handle_init()
1114 		pcie_port->regs->app.soc_int[0].mask_msi_leg_0 = &regs->app.soc_int.mask_msi_leg_0;  in al_pcie_port_handle_init()
1115 		pcie_port->regs->app.soc_int[0].mask_msi_leg_1 = &regs->app.soc_int.mask_msi_leg_1;  in al_pcie_port_handle_init()
1116 		pcie_port->regs->app.soc_int[0].mask_msi_leg_2 = &regs->app.soc_int.mask_msi_leg_2;  in al_pcie_port_handle_init()
1117 		pcie_port->regs->app.soc_int[0].mask_msi_leg_3 = &regs->app.soc_int.mask_msi_leg_3;  in al_pcie_port_handle_init()
1118 		pcie_port->regs->app.ctrl_gen = &regs->app.ctrl_gen;  in al_pcie_port_handle_init()
1119 		pcie_port->regs->app.parity = &regs->app.parity;  in al_pcie_port_handle_init()
1120 		pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair;  in al_pcie_port_handle_init()
1121 		pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair;  in al_pcie_port_handle_init()
1122 		pcie_port->regs->app.status_per_func[0] = &regs->app.status_per_func;  in al_pcie_port_handle_init()
1123 		pcie_port->regs->app.int_grp_a = &regs->app.int_grp_a;  in al_pcie_port_handle_init()
1124 		pcie_port->regs->app.int_grp_b = &regs->app.int_grp_b;  in al_pcie_port_handle_init()
1201 		pcie_port->regs->app.global_ctrl.port_init = &regs->app.global_ctrl.port_init;  in al_pcie_port_handle_init()
1202 		pcie_port->regs->app.global_ctrl.pm_control = &regs->app.global_ctrl.pm_control;  in al_pcie_port_handle_init()
1203 …pcie_port->regs->app.global_ctrl.corr_err_sts_int = &regs->app.global_ctrl.pended_corr_err_sts_int;  in al_pcie_port_handle_init()
1204 …pcie_port->regs->app.global_ctrl.uncorr_err_sts_int = &regs->app.global_ctrl.pended_uncorr_err_sts…  in al_pcie_port_handle_init()
1207 			pcie_port->regs->app.global_ctrl.events_gen[i] = &regs->app.events_gen_per_func[i].events_gen;  in al_pcie_port_handle_init()
1210 		pcie_port->regs->app.global_ctrl.sris_kp_counter = &regs->app.global_ctrl.sris_kp_counter_value;  in al_pcie_port_handle_init()
1211 		pcie_port->regs->app.debug = &regs->app.debug;  in al_pcie_port_handle_init()
1214 			pcie_port->regs->app.soc_int[i].status_0 = &regs->app.soc_int_per_func[i].status_0;  in al_pcie_port_handle_init()
1215 			pcie_port->regs->app.soc_int[i].status_1 = &regs->app.soc_int_per_func[i].status_1;  in al_pcie_port_handle_init()
1216 			pcie_port->regs->app.soc_int[i].status_2 = &regs->app.soc_int_per_func[i].status_2;  in al_pcie_port_handle_init()
1217 			pcie_port->regs->app.soc_int[i].status_3 = &regs->app.soc_int_per_func[i].status_3;  in al_pcie_port_handle_init()
1218 			pcie_port->regs->app.soc_int[i].mask_inta_leg_0 = &regs->app.soc_int_per_func[i].mask_inta_leg_0;  in al_pcie_port_handle_init()
1219 			pcie_port->regs->app.soc_int[i].mask_inta_leg_1 = &regs->app.soc_int_per_func[i].mask_inta_leg_1;  in al_pcie_port_handle_init()
1220 			pcie_port->regs->app.soc_int[i].mask_inta_leg_2 = &regs->app.soc_int_per_func[i].mask_inta_leg_2;  in al_pcie_port_handle_init()
1221 			pcie_port->regs->app.soc_int[i].mask_inta_leg_3 = &regs->app.soc_int_per_func[i].mask_inta_leg_3;  in al_pcie_port_handle_init()
1222 			pcie_port->regs->app.soc_int[i].mask_msi_leg_0 = &regs->app.soc_int_per_func[i].mask_msi_leg_0;  in al_pcie_port_handle_init()
1223 			pcie_port->regs->app.soc_int[i].mask_msi_leg_1 = &regs->app.soc_int_per_func[i].mask_msi_leg_1;  in al_pcie_port_handle_init()
1224 			pcie_port->regs->app.soc_int[i].mask_msi_leg_2 = &regs->app.soc_int_per_func[i].mask_msi_leg_2;  in al_pcie_port_handle_init()
1225 			pcie_port->regs->app.soc_int[i].mask_msi_leg_3 = &regs->app.soc_int_per_func[i].mask_msi_leg_3;  in al_pcie_port_handle_init()
1228 		pcie_port->regs->app.ap_user_send_msg = &regs->app.ap_user_send_msg;  in al_pcie_port_handle_init()
1229 		pcie_port->regs->app.ctrl_gen = &regs->app.ctrl_gen;  in al_pcie_port_handle_init()
1230 		pcie_port->regs->app.parity = &regs->app.parity;  in al_pcie_port_handle_init()
1231 		pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair;  in al_pcie_port_handle_init()
1232 		pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair;  in al_pcie_port_handle_init()
1233 		pcie_port->regs->app.cfg_func_ext = &regs->app.cfg_func_ext;  in al_pcie_port_handle_init()
1236 			pcie_port->regs->app.status_per_func[i] = &regs->app.status_per_func[i];  in al_pcie_port_handle_init()
1238 		pcie_port->regs->app.int_grp_a = &regs->app.int_grp_a;  in al_pcie_port_handle_init()
1239 		pcie_port->regs->app.int_grp_b = &regs->app.int_grp_b;  in al_pcie_port_handle_init()
1240 		pcie_port->regs->app.int_grp_c = &regs->app.int_grp_c;  in al_pcie_port_handle_init()
1241 		pcie_port->regs->app.int_grp_d = &regs->app.int_grp_d;  in al_pcie_port_handle_init()
1920 			regs->app.global_ctrl.port_init,  in al_pcie_link_start()
1941 			regs->app.global_ctrl.port_init,  in al_pcie_link_stop()
1953 	uint32_t port_init = al_reg_read32(regs->app.global_ctrl.port_init);  in al_pcie_is_link_started()
2083 	events_gen = al_reg_read32(regs->app.global_ctrl.events_gen[0]);  in al_pcie_link_hot_reset()
2096 		al_reg_write32_masked(regs->app.global_ctrl.events_gen[0],  in al_pcie_link_hot_reset()
2373 	al_reg_write32_masked(regs->app.global_ctrl.pm_control,  in al_pcie_app_req_retry_set()
2386 	pm_control = al_reg_read32(regs->app.global_ctrl.pm_control);  in al_pcie_app_req_retry_get_status()
2451 			&regs->app.atu.out_mask_pair[atu_region->index / 2] :  in al_pcie_atu_region_set()
2452 			&regs->app.atu.in_mask_pair[atu_region->index / 2];  in al_pcie_atu_region_set()
2502 			al_reg_write32_masked(regs->app.atu.reg_out_mask,  in al_pcie_atu_region_set()
2508 				&regs->app.atu.out_mask_pair[atu_region->index / 2] :  in al_pcie_atu_region_set()
2509 				&regs->app.atu.in_mask_pair[atu_region->index / 2];  in al_pcie_atu_region_set()
2631 	al_reg_write32_masked(regs->app.global_ctrl.events_gen[pf_num],  in al_pcie_pf_flr_done_gen()
2635 	al_reg_write32_masked(regs->app.global_ctrl.events_gen[pf_num],  in al_pcie_pf_flr_done_gen()
2653 	reg = al_reg_read32(regs->app.global_ctrl.events_gen[pf_num]);  in al_pcie_legacy_int_gen()
2655 	al_reg_write32(regs->app.global_ctrl.events_gen[pf_num], reg);  in al_pcie_legacy_int_gen()
2669 	reg = al_reg_read32(regs->app.global_ctrl.events_gen[pf_num]);  in al_pcie_msi_int_gen()
2675 	al_reg_write32(regs->app.global_ctrl.events_gen[pf_num], reg);  in al_pcie_msi_int_gen()
2678 	al_reg_write32(regs->app.global_ctrl.events_gen[pf_num], reg);  in al_pcie_msi_int_gen()