936 /** Enable ecrc generation in outbound atu (Addressing RMN: 5119) */
1046 		pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair;  in al_pcie_port_handle_init()
1047 		pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair;  in al_pcie_port_handle_init()
1120 		pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair;  in al_pcie_port_handle_init()
1121 		pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair;  in al_pcie_port_handle_init()
1231 		pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair;  in al_pcie_port_handle_init()
1232 		pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair;  in al_pcie_port_handle_init()
2390 /*************** Internal Address Translation Unit (ATU) API ******************/
2392 /** program internal ATU region entry */
2451 			&regs->app.atu.out_mask_pair[atu_region->index / 2] :  in al_pcie_atu_region_set()
2452 			&regs->app.atu.in_mask_pair[atu_region->index / 2];  in al_pcie_atu_region_set()
2489 	* In CFG request created via outbound atu (shift mode) bits [27:12] go to  in al_pcie_atu_region_set()
2490 	* [31:16] , the shifting is correct , however the ATU leaves bit [15:12]  in al_pcie_atu_region_set()
2496 	* rev=REV1,REV2 set bit 15 in corresponding app_reg.atu.out_mask  in al_pcie_atu_region_set()
2497 	* rev>REV2 set corresponding bit is app_reg.atu.reg_out_mask  in al_pcie_atu_region_set()
2502 			al_reg_write32_masked(regs->app.atu.reg_out_mask,  in al_pcie_atu_region_set()
2508 				&regs->app.atu.out_mask_pair[atu_region->index / 2] :  in al_pcie_atu_region_set()
2509 				&regs->app.atu.in_mask_pair[atu_region->index / 2];  in al_pcie_atu_region_set()
2570 /** obtains internal ATU region base/target addresses */