Lines Matching +full:serdes +full:- +full:clk
1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
227 /* [0x158] Cntl - internal */
231 /* [0x160] Status - internal */
233 /* [0x164] Status - internal */
235 /* [0x168] Status - internal */
237 /* [0x16c] Status - internal */
239 /* [0x170] Control - internal */
241 /* [0x174] Control - internal */
243 /* [0x178] Control - internal */
245 /* [0x17c] Control - internal */
247 /* [0x180] Control - internal */
249 /* [0x184] Control - internal */
251 /* [0x188] Control - internal */
253 /* [0x18c] Control - internal */
255 /* [0x190] Control - internal */
257 /* [0x194] Control - internal */
259 /* [0x198] Control - internal */
266 * [0x1a4] Control - internal
269 /* [0x1a8] Cfg - internal */
271 /* [0x1ac] Cfg - internal */
273 /* [0x1b0] Cfg - internal */
279 /* [0x1bc] Cfg-- timing parameters internal. */
281 /* [0x1c0] Cfg - internal */
295 /* [0x1dc] Control - not in use any more - internal */
299 /* [0x1e4] Cntl - internal */
808 /* SerDes one hot mux control. For details see datasheet. */
813 /* SerDes one hot mux control. For details see datasheet. */
818 /* SerDes one hot mux control. For details see datasheet. */
821 /* SerDes one hot mux control. For details see datasheet. */
824 /* SerDes one hot mux control. For details see datasheet. */
827 /* SerDes one hot mux control. For details see datasheet. */
830 /* SerDes one hot mux control. For details see datasheet. */
833 /* SerDes one hot mux control. For details see datasheet. */
836 /* SerDes one hot mux control. For details see datasheet. */
842 /* SerDes one hot mux control. For details see datasheet. */
850 * 2'b01 - select pcie_b[0]
851 * 2'b10 - select pcie_a[2]
856 * 2'b01 - select pcie_b[1]
857 * 2'b10 - select pcie_a[3]
862 * 2'b01 - select pcie_b[0]
863 * 2'b10 - select pcie_a[4]
868 * 2'b01 - select pcie_b[1]
869 * 2'b10 - select pcie_a[5]
874 * 2'b01 - select pcie_b[2]
875 * 2'b10 - select pcie_a[6]
880 * 2'b01 - select pcie_b[3]
881 * 2'b10 - select pcie_a[7]
886 * 2'b01 - select pcie_d[0]
887 * 2'b10 - select pcie_c[2]
892 * 2'b01 - select pcie_d[1]
893 * 2'b10 - select pcie_c[3]
918 * [15:9] - Reserved
927 /* I2C pre-load status */
1080 /* Value-- internal */
1083 /* Value-- internal */
1085 /* Value-- internal */
1087 /* Value-- internal */
1089 /* Value-- internal */
1091 /* Value-- internal */
1093 /* Value-- internal */
1095 /* Value-- internal */
1097 /* Value-- internal */
1145 /* [31:16] : 0x0 - Dev ID */
1156 * // [0] -- DSR_N RW bit
1157 * // [1] -- DCD_N RW bit
1158 * // [2] -- RI_N bit
1159 * // [3] -- dma_tx_ack_n
1160 * // [4] -- dma_rx_ack_n
1166 * // [16] -- dtr_n RO bit
1167 * // [17] -- OUT1_N RO bit
1168 * // [18] -- OUT2_N RO bit
1169 * // [19] -- dma_tx_req_n RO bit
1170 * // [20] -- dma_tx_single_n RO bit
1171 * // [21] -- dma_rx_req_n RO bit
1172 * // [22] -- dma_rx_single_n RO bit
1173 * // [23] -- uart_lp_req_pclk RO bit
1174 * // [24] -- baudout_n RO bit
1181 * Conf: // [0] -- DSR_N RW bit // [1] -- DCD_N RW bit // [2] -- RI_N bit // [3]
1182 * -- dma_tx_ack_n // [4] - dma_rx_ack_n
1187 * Status: // [16] -- dtr_n RO bit // [17] -- OUT1_N RO bit // [18] -- OUT2_N RO
1188 * bit // [19] -- dma_tx_req_n RO bit // [20] -- dma_tx_single_n RO bit // [21]
1189 * -- dma_rx_req_n RO bit // [22] -- dma_rx_single_n RO bit // [23] --
1190 * uart_lp_req_pclk RO bit // [24] -- baudout_n RO bit
1197 * Conf: // [0] -- DSR_N RW bit // [1] -- DCD_N RW bit // [2] -- RI_N bit // [3]
1198 * -- dma_tx_ack_n // [4] - dma_rx_ack_n
1203 * Status: // [16] -- dtr_n RO bit // [17] -- OUT1_N RO bit // [18] -- OUT2_N RO
1204 * bit // [19] -- dma_tx_req_n RO bit // [20] -- dma_tx_single_n RO bit // [21]
1205 * -- dma_rx_req_n RO bit // [22] -- dma_rx_single_n RO bit // [23] --
1206 * uart_lp_req_pclk RO bit // [24] -- baudout_n RO bit
1213 * Conf: // [0] -- DSR_N RW bit // [1] -- DCD_N RW bit // [2] -- RI_N bit // [3]
1214 * -- dma_tx_ack_n // [4] - dma_rx_ack_n
1219 * Status: // [16] -- dtr_n RO bit // [17] -- OUT1_N RO bit // [18] -- OUT2_N RO
1220 * bit // [19] -- dma_tx_req_n RO bit // [20] -- dma_tx_single_n RO bit // [21]
1221 * -- dma_rx_req_n RO bit // [22] -- dma_rx_single_n RO bit // [23] --
1222 * uart_lp_req_pclk RO bit // [24] -- baudout_n RO bit
1305 * // [0] -- dma_tx_ack
1306 * // [1] -- dma_rx_ack
1313 * // [16] -- dma_tx_req RO bit
1314 * // [17] -- dma_tx_single RO bit
1315 * // [18] -- dma_rx_req RO bit
1316 * // [19] -- dma_rx_single RO bit
1392 /* SerDes one hot mux control. For details see datasheet. */
1397 /* SerDes one hot mux control. For details see datasheet. */
1402 /* SerDes one hot mux control. For details see datasheet. */
1407 /* SerDes one hot mux control. For details see datasheet. */
1412 /* SerDes one hot mux control. For details see datasheet. */
1415 /* SerDes one hot mux control. For details see datasheet. */
1418 /* SerDes one hot mux control. For details see datasheet. */
1421 /* SerDes one hot mux control. For details see datasheet. */
1429 * 2'b01 - select sata_b[0]
1430 * 2'b10 - select eth_a[0]
1435 * 3'b001 - select sata_b[1]
1436 * 3'b010 - select eth_b[0]
1437 * 3'b100 - select eth_a[1]
1442 * 3'b001 - select sata_b[2]
1443 * 3'b010 - select eth_c[0]
1444 * 3'b100 - select eth_a[2]
1449 * 3'b001 - select sata_b[3]
1450 * 3'b010 - select eth_d[0]
1451 * 3'b100 - select eth_a[3]
1456 * 2'b01 - select eth_a[0]
1457 * 2'b10 - select sata_a[0]
1462 * 3'b001 - select eth_b[0]
1463 * 3'b010 - select eth_c[1]
1464 * 3'b100 - select sata_a[1]
1469 * 3'b001 - select eth_a[0]
1470 * 3'b010 - select eth_c[2]
1471 * 3'b100 - select sata_a[2]
1476 * 3'b001 - select eth_d[0]
1477 * 3'b010 - select eth_c[3]
1478 * 3'b100 - select sata_a[3]
1484 /* SerDes one hot mux control. For details see datasheet. */
1490 /* SerDes one hot mux control. For details see datasheet. */
1495 /* SerDes one hot mux control. For details see datasheet. */
1501 /* SerDes one hot mux control. For details see datasheet. */
1510 * Value 0 - Select dedicated pins for the USB-1 inputs.
1511 * Value 1 - Select PBS mux pins for the USB-1 inputs.
1520 * [3] - Force to zero
1521 * [2] == 1 - Force register selection
1522 * [1 : 0] -Binary selection of the input in bypass mode
1633 /* For remapping are used bits [39 - 29] of DRAM 40bit Physical address */
1641 * 2'b01 - eth_a[0] from serdes_8
1642 * 2'b10 - eth_a[0] from serdes_14
1647 * 2'b01 - eth_b[0] from serdes_9
1648 * 2'b10 - eth_b[0] from serdes_13
1653 * 2'b01 - eth_c[0] from serdes_10
1654 * 2'b10 - eth_c[0] from serdes_12
1659 * 2'b01 - eth_d[0] from serdes_11
1660 * 2'b10 - eth_d[0] from serdes_15
1664 /* which lane's is master clk */
1667 /* which lane's is master clk */
1677 * 2'b01 - select pcie_b[0] from serdes 2
1678 * 2'b10 - select pcie_b[0] from serdes 4
1683 * 2'b01 - select pcie_b[1] from serdes 3
1684 * 2'b10 - select pcie_b[1] from serdes 5
1689 * 2'b01 - select pcie_d[0] from serdes 10
1690 * 2'b10 - select pcie_d[0] from serdes 12
1695 * 2'b01 - select pcie_d[1] from serdes 11
1696 * 2'b10 - select pcie_d[1] from serdes 13
1703 * 2'b01 - select sata_a from serdes group 1
1704 * 2'b10 - select sata_a from serdes group 3