Lines Matching +full:- +full:30 +full:mv
44 * Disassembly begins in dis_distable, which is equivalent to the One-byte
45 * Opcode Map in the Intel IA32 ISA Reference (page A-6 in my copy). The
52 * DIS_MEM Include memory-size calculations
73 /* field terminates - no pointer. */
108 Mv, enumerator
135 DSHIFT, /* for double shift that has an 8-bit immediate */
151 DM, /* 16-bit data */
152 AM, /* 16-bit addr */
153 LSEG, /* for 3-bit seg reg encoding */
162 RET, /* single immediate 16-bit operand */
173 MMO, /* Prefixable MMX/SIMD-Int mm/mem -> mm */
174 MMOIMPL, /* Prefixable MMX/SIMD-Int mm -> mm (mem) */
175 MMO3P, /* Prefixable MMX/SIMD-Int mm -> r32,imm8 */
176 MMOM3, /* Prefixable MMX/SIMD-Int mm -> r32 */
177 MMOS, /* Prefixable MMX/SIMD-Int mm -> mm/mem */
178 MMOMS, /* Prefixable MMX/SIMD-Int mm -> mem */
179 MMOPM, /* MMX/SIMD-Int mm/mem -> mm,imm8 */
180 MMOPM_66o, /* MMX/SIMD-Int 0x66 optional mm/mem -> mm,imm8 */
181 MMOPRM, /* Prefixable MMX/SIMD-Int r32/mem -> mm,imm8 */
183 MM, /* MMX/SIMD-Int mm/mem -> mm */
184 MMS, /* MMX/SIMD-Int mm -> mm/mem */
186 XMMO, /* Prefixable SIMD xmm/mem -> xmm */
187 XMMOS, /* Prefixable SIMD xmm -> xmm/mem */
189 XMMOMX, /* Prefixable SIMD mm/mem -> xmm */
190 XMMOX3, /* Prefixable SIMD xmm -> r32 */
191 XMMOXMM, /* Prefixable SIMD xmm/mem -> mm */
192 XMMOM, /* Prefixable SIMD xmm -> mem */
193 XMMOMS, /* Prefixable SIMD mem -> xmm */
194 XMM, /* SIMD xmm/mem -> xmm */
195 XMM_66r, /* SIMD 0x66 prefix required xmm/mem -> xmm */
196 XMM_66o, /* SIMD 0x66 prefix optional xmm/mem -> xmm */
197 XMMXIMPL, /* SIMD xmm -> xmm (mem) */
198 XMM3P, /* SIMD xmm -> r32,imm8 */
199 XMM3PM_66r, /* SIMD 0x66 prefix required xmm -> r32/mem,imm8 */
203 XMMPRM, /* SIMD r32/mem -> xmm,imm8 */
204 XMMPRM_66r, /* SIMD 0x66 prefix required r32/mem -> xmm,imm8 */
205 XMMS, /* SIMD xmm -> xmm/mem */
206 XMMM, /* SIMD mem -> xmm */
207 XMMM_66r, /* SIMD 0x66 prefix required mem -> xmm */
208 XMMMS, /* SIMD xmm -> mem */
209 XMM3MX, /* SIMD r32/mem -> xmm */
210 XMM3MXS, /* SIMD xmm -> r32/mem */
212 XMMXM3, /* SIMD xmm/mem -> r32 */
213 XMMX3, /* SIMD xmm -> r32 */
214 XMMXMM, /* SIMD xmm/mem -> mm */
215 XMMMX, /* SIMD mm -> xmm */
216 XMMXM, /* SIMD xmm -> mm */
217 XMMX2I, /* SIMD xmm -> xmm, imm, imm */
224 VEX_MO, /* VEX mod_rm -> implicit reg */
225 VEX_RMrX, /* VEX VEX.vvvv, mod_rm -> mod_reg */
226 VEX_VRMrX, /* VEX mod_rm, VEX.vvvv -> mod_rm */
227 VEX_RRX, /* VEX VEX.vvvv, mod_reg -> mod_rm */
228 VEX_RMRX, /* VEX VEX.vvvv, mod_rm, imm8[7:4] -> mod_reg */
229 VEX_MX, /* VEX mod_rm -> mod_reg */
230 VEX_MXI, /* VEX mod_rm, imm8 -> mod_reg */
231 VEX_XXI, /* VEX mod_rm, imm8 -> VEX.vvvv */
232 VEX_MR, /* VEX mod_rm -> mod_reg */
233 VEX_RRI, /* VEX mod_reg, mod_rm -> implicit(eflags/r32) */
234 VEX_RX, /* VEX mod_reg -> mod_rm */
235 VEX_KRR, /* VEX mod_rm -> mod_reg */
236 VEX_KMR, /* VEX mod_reg -> mod_rm */
237 VEX_KRM, /* VEX mod_rm -> mod_reg */
238 VEX_RR, /* VEX mod_rm -> mod_reg */
239 VEX_RRi, /* VEX mod_rm, imm8 -> mod_reg */
240 VEX_RM, /* VEX mod_reg -> mod_rm */
241 VEX_RIM, /* VEX mod_reg, imm8 -> mod_rm */
242 VEX_RRM, /* VEX VEX.vvvv, mod_reg -> mod_rm */
243 VEX_RMX, /* VEX VEX.vvvv, mod_rm -> mod_reg */
244 VEX_SbVM, /* VEX SIB, VEX.vvvv -> mod_rm */
250 ADX, /* ADX instructions, support REX.w, mod_rm->mod_reg */
251 EVEX_RX, /* EVEX mod_reg -> mod_rm */
252 EVEX_MX, /* EVEX mod_rm -> mod_reg */
253 EVEX_RMrX, /* EVEX EVEX.vvvv, mod_rm -> mod_reg */
254 EVEX_RMRX /* EVEX EVEX.vvvv, mod_rm, imm8 -> mod_reg */
260 #define VEX_2bytes 0xC5 /* the first byte of two-byte form */
261 #define VEX_3bytes 0xC4 /* the first byte of three-byte form */
289 * IND - indirect to another to another table
290 * "T" - means to Terminate indirections (this is the final opcode)
291 * "S" - means "operand length suffix required"
292 * "Sa" - means AVX2 suffix (q/d) required
293 * "Sq" - means AVX512 suffix (q/d) required
294 * "Sd" - means AVX512 suffix (d/s) required
295 * "NS" - means "no suffix" which is the operand length suffix of the opcode
296 * "Z" - means instruction size arg required
297 * "u" - means the opcode is invalid in IA32 but valid in amd64
298 * "x" - means the opcode is invalid in amd64, but not IA32
299 * "y" - means the operand size is always 64 bits in 64 bit mode
300 * "p" - means push/pop stack operation
301 * "vr" - means VEX instruction that operates on normal registers, not fpu
302 * "vo" - means VEX instruction that operates on opmask registers, not fpu
592 * Decode table for 0x0F18 opcodes -- SIMD prefetch
601 * Decode table for 0x0FAE opcodes -- SIMD state save/restore
609 * Decode table for 0xF30FAE opcodes -- FSGSBASE
667 * Decode table for 0x0FC8 opcode -- 486 bswap instruction
676 * Decode table for 0x0F71, 0x0F72, and 0x0F73 opcodes -- MMX instructions
694 * Decode table for SIMD extensions to above 0x0F71-0x0F73 opcodes.
714 * instruction - addss. At present, three prefixes have been coopted in
715 * this manner - address size (0x66), repnz (0xf2) and repz (0xf3). The
739 /* [30] */ INVALID, INVALID, INVALID, INVALID,
821 /* [30] */ INVALID, INVALID, INVALID, INVALID,
906 /* [30] */ INVALID, INVALID, INVALID, INVALID,
988 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1070 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1152 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1234 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1318 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1400 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1485 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1570 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1652 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1734 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1817 /* [30] */ INVALID, INVALID, INVALID, INVALID,
1899 /* [30] */ INVALID, INVALID, INVALID, INVALID,
2003 /* [30] */ TNSZ("pmovzxbw",XMM_66r,16),TNSZ("pmovzxbd",XMM_66r,16),TNSZ("pmovzxbq",XMM_66r,16),TN…
2084 /* [30] */ TNSZ("vpmovzxbw",VEX_MX,16),TNSZ("vpmovzxbd",VEX_MX,16),TNSZ("vpmovzxbq",VEX_MX,16),TN…
2165 /* [30] */ INVALID, INVALID, INVALID, INVALID,
2247 /* [30] */ TSvo("kshiftr",VEX_MXI), TSvo("kshiftr",VEX_MXI), TSvo("kshiftl",VEX_MXI), TSvo("kshif…
2315 * indicate a sub-code.
2343 /* [30] */ TNS("wrmsr",NORM), TNS("rdtsc",NORM), TNS("rdmsr",NORM), TNS("rdpmc",NORM),
2426 /* [30] */ INVALID, INVALID, INVALID, INVALID,
2549 /* [0] */ TNS("rolb",Mv), TNS("rorb",Mv), TNS("rclb",Mv), TNS("rcrb",Mv),
2550 /* [4] */ TNS("shlb",Mv), TNS("shrb",Mv), TNS("salb",Mv), TNS("sarb",Mv),
2570 /* [0] */ TS("rol",Mv), TS("ror",Mv), TS("rcl",Mv), TS("rcr",Mv),
2571 /* [4] */ TS("shl",Mv), TS("shr",Mv), TS("sal",Mv), TS("sar",Mv),
2581 /* [0] */ TNS("rolb",Mv), TNS("rorb",Mv), TNS("rclb",Mv), TNS("rcrb",Mv),
2582 /* [4] */ TNS("shlb",Mv), TNS("shrb",Mv), TNS("salb",Mv), TNS("sarb",Mv),
2590 /* [0] */ TS("rol",Mv), TS("ror",Mv), TS("rcl",Mv), TS("rcr",Mv),
2591 /* [4] */ TS("shl",Mv), TS("shr",Mv), TS("salb",Mv), TS("sar",Mv),
2834 * - use the MOVSXD (sign extend 32 to 64 bits) instruction
2835 * - access the %sil, %dil, %bpl, %spl registers
2854 /* Vector Length, 0: scalar or 128-bit vector, 1: 256-bit vector */
2856 /* Vector Length, 0: scalar or 128-bit vector, 1: 256-bit vector, 2: 512-bit */
2859 #define VEX_m 0x1F /* VEX m-mmmm field */
2864 /* VEX m-mmmm field, only used by three bytes prefix */
2891 #define BYTE_OPND 0 /* w-bit value indicating byte register */
2892 #define LONG_OPND 1 /* w-bit value indicating opnd_size register */
2899 #define WORD_OPND 8 /* w-bit value indicating word size reg */
2912 * instruction opcodes, which are 0x90-0x93, so we subtract 0x90 to index into
2917 * [opcode - 0x90][VEX_W][VEX_L].
2990 if (x->d86_len >= 15) in dtrace_get_opcode()
2991 return (x->d86_error = 1); in dtrace_get_opcode()
2993 if (x->d86_error) in dtrace_get_opcode()
2995 byte = x->d86_get_byte(x->d86_data); in dtrace_get_opcode()
2997 return (x->d86_error = 1); in dtrace_get_opcode()
2998 x->d86_bytes[x->d86_len++] = byte; in dtrace_get_opcode()
2999 *low = byte & 0xf; /* ----xxxx low 4 bits */ in dtrace_get_opcode()
3000 *high = byte >> 4 & 0xf; /* xxxx---- bits 7 to 4 */ in dtrace_get_opcode()
3012 if (x->d86_error) in dtrace_get_SIB()
3015 byte = x->d86_get_byte(x->d86_data); in dtrace_get_SIB()
3017 x->d86_error = 1; in dtrace_get_SIB()
3020 x->d86_bytes[x->d86_len++] = byte; in dtrace_get_SIB()
3034 if (x->d86_got_modrm == 0) { in dtrace_get_modrm()
3035 if (x->d86_rmindex == -1) in dtrace_get_modrm()
3036 x->d86_rmindex = x->d86_len; in dtrace_get_modrm()
3038 x->d86_got_modrm = 1; in dtrace_get_modrm()
3090 (void) strlcat(x->d86_mnem, vex_W != 0 ? "64" : "32", in dtrace_evex_mnem_adjust()
3100 (void) strlcat(x->d86_mnem, "32", OPLEN); in dtrace_evex_mnem_adjust()
3103 (void) strlcat(x->d86_mnem, "8", OPLEN); in dtrace_evex_mnem_adjust()
3106 (void) strlcat(x->d86_mnem, "64", OPLEN); in dtrace_evex_mnem_adjust()
3109 (void) strlcat(x->d86_mnem, "16", OPLEN); in dtrace_evex_mnem_adjust()
3114 if (dp->it_avxsuf == AVS5Q) { in dtrace_evex_mnem_adjust()
3115 (void) strlcat(x->d86_mnem, vex_W != 0 ? "q" : "d", in dtrace_evex_mnem_adjust()
3123 * EVEX prefix bits present. See Intel 64 and IA-32 Architectures Software
3124 * Developer’s Manual Volume 2 (IASDv2), section 2.6.1 Table 2-30 and
3125 * section 2.6.2 Table 2-31.
3154 * Use evex_L to set wbit. See IASDv2 Section 2.6.10 and Table 2-36.
3179 d86opnd_t *opnd = &x->d86_opnd[opindex]; in dtrace_evex_adjust_disp8_n()
3181 if (x->d86_error) in dtrace_evex_adjust_disp8_n()
3191 opnd->d86_value *= 16; in dtrace_evex_adjust_disp8_n()
3194 opnd->d86_value *= 32; in dtrace_evex_adjust_disp8_n()
3197 opnd->d86_value *= 64; in dtrace_evex_adjust_disp8_n()
3203 * Adjust target for opmask and zeroing. See IASDv2 Section 2.6.1 Table 2-30.
3210 char *opnd = x->d86_opnd[tgtop].d86_opnd; in dtrace_evex_adjust_z_opmask()
3213 if (x->d86_error) in dtrace_evex_adjust_z_opmask()
3240 if (x->d86_numopnds < opindex + 1) in dtrace_imm_opnd()
3241 x->d86_numopnds = opindex + 1; in dtrace_imm_opnd()
3248 if (x->d86_opnd_size == SIZE16) in dtrace_imm_opnd()
3250 else if (x->d86_opnd_size == SIZE32) in dtrace_imm_opnd()
3272 if (x->d86_error) in dtrace_imm_opnd()
3274 x->d86_opnd[opindex].d86_value = 0; in dtrace_imm_opnd()
3276 byte = x->d86_get_byte(x->d86_data); in dtrace_imm_opnd()
3278 x->d86_error = 1; in dtrace_imm_opnd()
3281 x->d86_bytes[x->d86_len++] = byte; in dtrace_imm_opnd()
3282 x->d86_opnd[opindex].d86_value |= (uint64_t)byte << (i * 8); in dtrace_imm_opnd()
3285 if (x->d86_bytes[x->d86_len - 1] & 0x80) { in dtrace_imm_opnd()
3287 x->d86_opnd[opindex].d86_value |= in dtrace_imm_opnd()
3291 x->d86_opnd[opindex].d86_mode = MODE_SIGNED; in dtrace_imm_opnd()
3292 x->d86_opnd[opindex].d86_value_size = valsize; in dtrace_imm_opnd()
3293 x->d86_imm_bytes += size; in dtrace_imm_opnd()
3305 x->d86_opnd[opindex].d86_mode = MODE_IPREL; in dtrace_disp_opnd()
3319 if (x->d86_seg_prefix) { in dtrace_check_override()
3320 (void) strlcat(x->d86_opnd[opindex].d86_prefix, in dtrace_check_override()
3321 x->d86_seg_prefix, PFIXLEN); in dtrace_check_override()
3324 x->d86_seg_prefix = NULL; in dtrace_check_override()
3342 int have_SIB = 0; /* flag presence of scale-index-byte */ in dtrace_get_operand()
3343 uint_t ss; /* scale-factor from opcode */ in dtrace_get_operand()
3348 char *opnd = x->d86_opnd[opindex].d86_opnd; in dtrace_get_operand()
3351 if (x->d86_numopnds < opindex + 1) in dtrace_get_operand()
3352 x->d86_numopnds = opindex + 1; in dtrace_get_operand()
3354 if (x->d86_error) in dtrace_get_operand()
3391 if (x->d86_rex_prefix == 0) in dtrace_get_operand()
3400 if (x->d86_opnd_size == SIZE16) in dtrace_get_operand()
3402 else if (x->d86_opnd_size == SIZE32) in dtrace_get_operand()
3424 if (x->d86_addr_size == SIZE16) { in dtrace_get_operand()
3431 x->d86_opnd[opindex].d86_mode = MODE_SIGNED; in dtrace_get_operand()
3433 x->d86_opnd[opindex].d86_mode = MODE_NONE; in dtrace_get_operand()
3435 x->d86_opnd[opindex].d86_mode = MODE_OFFSET; in dtrace_get_operand()
3450 if (x->d86_error) in dtrace_get_operand()
3453 if (x->d86_rex_prefix & REX_B) in dtrace_get_operand()
3455 if (x->d86_rex_prefix & REX_X) in dtrace_get_operand()
3477 if (x->d86_error) in dtrace_get_operand()
3483 x->d86_opnd[opindex].d86_mode = MODE_OFFSET; in dtrace_get_operand()
3486 if (x->d86_mode == SIZE32) { in dtrace_get_operand()
3498 x->d86_opnd[opindex].d86_mode = in dtrace_get_operand()
3511 if (x->d86_mode == SIZE32) /* NOTE this is not addr_size! */ in dtrace_get_operand()
3516 if (x->d86_vsib != 0) { in dtrace_get_operand()
3534 if (index != ESP_REGNO || x->d86_vsib != 0) { in dtrace_get_operand()
3547 if (index != ESP_REGNO || x->d86_vsib) { in dtrace_get_operand()
3568 dtrace_get_operand(x, REG_ONLY, reg, wbit, 1 - vbit); \
3581 dtrace_get_operand(x, REG_ONLY, reg, w2, 1 - vbit); \
3593 dtrace_get_operand(x, mode, r_m, wbit, 2-vbit); \
3627 * returns non-zero for bad opcode
3693 * For 32-bit mode, it should prefetch the next byte to in dtrace_disx86()
3720 x->d86_len = 0; in dtrace_disx86()
3721 x->d86_rmindex = -1; in dtrace_disx86()
3722 x->d86_error = 0; in dtrace_disx86()
3723 x->d86_numopnds = 0; in dtrace_disx86()
3725 x->d86_seg_prefix = NULL; in dtrace_disx86()
3726 x->d86_mnem[0] = 0; in dtrace_disx86()
3728 x->d86_opnd[i].d86_opnd[0] = 0; in dtrace_disx86()
3729 x->d86_opnd[i].d86_prefix[0] = 0; in dtrace_disx86()
3730 x->d86_opnd[i].d86_value_size = 0; in dtrace_disx86()
3731 x->d86_opnd[i].d86_value = 0; in dtrace_disx86()
3732 x->d86_opnd[i].d86_mode = MODE_NONE; in dtrace_disx86()
3735 x->d86_rex_prefix = 0; in dtrace_disx86()
3736 x->d86_got_modrm = 0; in dtrace_disx86()
3737 x->d86_memsize = 0; in dtrace_disx86()
3738 x->d86_vsib = 0; in dtrace_disx86()
3759 x->d86_check_func != NULL && x->d86_check_func(x->d86_data)) { in dtrace_disx86()
3761 (void) strncpy(x->d86_mnem, ".byte\t0", OPLEN); in dtrace_disx86()
3774 switch (dp->it_adrmode) { in dtrace_disx86()
3784 x->d86_seg_prefix = (char *)dp->it_name; in dtrace_disx86()
3786 if (dp->it_invalid64 && cpu_mode == SIZE64) in dtrace_disx86()
3805 * Some of the segment prefixes are no-ops. (only FS/GS actually work) in dtrace_disx86()
3806 * We might have a REX prefix (opcodes 0x40-0x4f) in dtrace_disx86()
3821 x->d86_rex_prefix = 0x40; in dtrace_disx86()
3831 x->d86_rex_prefix = 0x40; in dtrace_disx86()
3839 * "bound" is only valid for 32-bit. For 64-bit this byte begins the in dtrace_disx86()
3906 x->d86_rex_prefix |= REX_R; in dtrace_disx86()
3908 x->d86_rex_prefix |= REX_X; in dtrace_disx86()
3910 x->d86_rex_prefix |= REX_B; in dtrace_disx86()
3974 x->d86_rex_prefix |= REX_R; in dtrace_disx86()
4010 x->d86_rex_prefix |= REX_R; in dtrace_disx86()
4012 x->d86_rex_prefix |= REX_X; in dtrace_disx86()
4014 x->d86_rex_prefix |= REX_B; in dtrace_disx86()
4024 x->d86_rex_prefix |= REX_W; in dtrace_disx86()
4089 if (dp->it_vexwoxmm) { in dtrace_disx86()
4091 } else if (dp->it_vexopmask) { in dtrace_disx86()
4127 * The pause instruction - a repz'd nop. This doesn't fit in dtrace_disx86()
4129 * special-case it here. in dtrace_disx86()
4140 if (dp->it_indirect == (instable_t *)dis_op0F) { in dtrace_disx86()
4164 if (strcmp(dp->it_name, "INVALID") == 0) in dtrace_disx86()
4167 switch (dp->it_adrmode) { in dtrace_disx86()
4203 if (dp->it_indirect == (instable_t *)dis_op0F38F0 || in dtrace_disx86()
4204 dp->it_indirect == (instable_t *)dis_op0F38F1) { in dtrace_disx86()
4206 dp = dp->it_indirect; in dtrace_disx86()
4225 * they always default to having 32-bit operands. in dtrace_disx86()
4226 * However, if the CPU is in 64-bit mode, then and only in dtrace_disx86()
4227 * then, does it use REX.w promotes things to 64-bits in dtrace_disx86()
4228 * and REX.r allows 64-bit mode to use register r8-r15. in dtrace_disx86()
4230 if (dp->it_indirect == (instable_t *)dis_op0F38F6) { in dtrace_disx86()
4231 dp = dp->it_indirect; in dtrace_disx86()
4249 if (strcmp(dp->it_name, "INVALID") == 0) in dtrace_disx86()
4252 switch (dp->it_adrmode) { in dtrace_disx86()
4300 x->d86_got_modrm = 0; in dtrace_disx86()
4301 if (dp->it_indirect != TERM) { in dtrace_disx86()
4303 if (x->d86_error) in dtrace_disx86()
4308 * decode 287 instructions (D8-DF) from opcodeN in dtrace_disx86()
4318 dp = (instable_t *)&dis_opFP4[opcode3 - 4][r_m]; in dtrace_disx86()
4321 &dis_opFP3[opcode2 - 8][opcode3]; in dtrace_disx86()
4324 &dis_opFP1n2[opcode2 - 8][opcode3]; in dtrace_disx86()
4326 dp = (instable_t *)dp->it_indirect + opcode3; in dtrace_disx86()
4341 if (cpu_mode == SIZE64 && dp->it_invalid64 || in dtrace_disx86()
4342 cpu_mode != SIZE64 && dp->it_invalid32) in dtrace_disx86()
4344 if (dp->it_indirect != TERM) in dtrace_disx86()
4352 switch (dp->it_adrmode) { in dtrace_disx86()
4389 if ((uintptr_t)dp - (uintptr_t)dis_op0F > sizeof (dis_op0F)) in dtrace_disx86()
4392 off = ((uintptr_t)dp - (uintptr_t)dis_op0F) / in dtrace_disx86()
4432 if ((uintptr_t)dp - (uintptr_t)dis_op0FC7 > sizeof (dis_op0FC7)) in dtrace_disx86()
4435 off = ((uintptr_t)dp - (uintptr_t)dis_op0FC7) / in dtrace_disx86()
4483 if ((uintptr_t)dp - (uintptr_t)dis_op0F7123 > in dtrace_disx86()
4488 off = ((uintptr_t)dp - (uintptr_t)dis_op0F7123) / in dtrace_disx86()
4503 if ((uintptr_t)dp - (uintptr_t)dis_op0F > in dtrace_disx86()
4507 off = ((uintptr_t)dp - (uintptr_t)dis_op0F) / in dtrace_disx86()
4519 if ((uintptr_t)dp - (uintptr_t)dis_op0FAE > in dtrace_disx86()
4523 off = ((uintptr_t)dp - (uintptr_t)dis_op0FAE) / in dtrace_disx86()
4536 if (dp->it_always64 || (opnd_size == SIZE32 && dp->it_stackop)) in dtrace_disx86()
4545 (void) strlcat(x->d86_mnem, "lock ", OPLEN); in dtrace_disx86()
4548 (void) strlcat(x->d86_mnem, "repnz ", OPLEN); in dtrace_disx86()
4550 (void) strlcat(x->d86_mnem, "repz ", OPLEN); in dtrace_disx86()
4553 (void) strlcat(x->d86_mnem, "addr32 ", OPLEN); in dtrace_disx86()
4555 if (dp->it_adrmode != CBW && in dtrace_disx86()
4556 dp->it_adrmode != CWD && in dtrace_disx86()
4557 dp->it_adrmode != XMMSFNC) { in dtrace_disx86()
4558 if (strcmp(dp->it_name, "INVALID") == 0) in dtrace_disx86()
4560 (void) strlcat(x->d86_mnem, dp->it_name, OPLEN); in dtrace_disx86()
4561 if (dp->it_avxsuf == AVS2 && dp->it_suffix) { in dtrace_disx86()
4562 (void) strlcat(x->d86_mnem, vex_W != 0 ? "q" : "d", in dtrace_disx86()
4564 } else if (dp->it_vexopmask && dp->it_suffix) { in dtrace_disx86()
4570 (void) strlcat(x->d86_mnem, in dtrace_disx86()
4574 (void) strlcat(x->d86_mnem, in dtrace_disx86()
4580 (void) strlcat(x->d86_mnem, in dtrace_disx86()
4586 (void) strlcat(x->d86_mnem, in dtrace_disx86()
4594 (void) strlcat(x->d86_mnem, in dtrace_disx86()
4600 (void) strlcat(x->d86_mnem, in dtrace_disx86()
4604 } else if (dp->it_suffix) { in dtrace_disx86()
4609 if (x->d86_mnem[i] == '.') in dtrace_disx86()
4612 x->d86_mnem[i - 1] = *types[opnd_size]; in dtrace_disx86()
4619 (void) strlcat(x->d86_mnem, "d", OPLEN); in dtrace_disx86()
4622 (void) strlcat(x->d86_mnem, types[opnd_size], in dtrace_disx86()
4632 x->d86_mode = cpu_mode; in dtrace_disx86()
4637 x->d86_rex_prefix = rex_prefix; in dtrace_disx86()
4638 x->d86_opnd_size = opnd_size; in dtrace_disx86()
4639 x->d86_addr_size = addr_size; in dtrace_disx86()
4640 vbit = 0; /* initialize for mem/reg -> reg */ in dtrace_disx86()
4641 switch (dp->it_adrmode) { in dtrace_disx86()
4649 (void) strncpy(x->d86_mnem, "movzld", OPLEN); in dtrace_disx86()
4653 x->d86_opnd_size = SIZE64; in dtrace_disx86()
4655 x->d86_opnd_size = opnd_size = SIZE32; in dtrace_disx86()
4669 x->d86_mnem[5] = 'q'; in dtrace_disx86()
4674 x->d86_opnd_size = opnd_size = SIZE16; in dtrace_disx86()
4682 x->d86_opnd_size = opnd_size; in dtrace_disx86()
4689 x->d86_opnd_size = opnd_size = SIZE16; in dtrace_disx86()
4696 x->d86_opnd_size = opnd_size; in dtrace_disx86()
4702 x->d86_opnd_size = opnd_size = SIZE16; in dtrace_disx86()
4704 /* reg -> mem */ in dtrace_disx86()
4708 /* mem -> reg */ in dtrace_disx86()
4715 * imul instruction, with either 8-bit or longer immediate in dtrace_disx86()
4716 * opcode 0x6B for byte, sign-extended displacement, 0x69 for word(s) in dtrace_disx86()
4751 wbit = strcmp(dp->it_name, "movd") ? MM_OPND : LONG_OPND; in dtrace_disx86()
4809 /* w-bit here (with regs) is bit 3 */ in dtrace_disx86()
4844 dtrace_get_operand(x, REG_ONLY, EAX_REGNO, wbit, 1 - vbit); in dtrace_disx86()
4847 x->d86_opnd[vbit].d86_mode = MODE_OFFSET; in dtrace_disx86()
4862 dtrace_get_operand(x, REG_ONLY, reg, SEG_OPND, 1 - vbit); in dtrace_disx86()
4870 case Mv: in dtrace_disx86()
4877 (void) strlcat(x->d86_opnd[0].d86_opnd, "%cl", OPLEN); in dtrace_disx86()
4879 x->d86_opnd[0].d86_mode = MODE_SIGNED; in dtrace_disx86()
4880 x->d86_opnd[0].d86_value_size = 1; in dtrace_disx86()
4881 x->d86_opnd[0].d86_value = 1; in dtrace_disx86()
4913 (void) strncpy(x->d86_mnem, "swapgs", OPLEN); in dtrace_disx86()
4919 (void) strncpy(x->d86_mnem, "rdtscp", OPLEN); in dtrace_disx86()
4925 (void) strncpy(x->d86_mnem, "monitorx", OPLEN); in dtrace_disx86()
4931 (void) strncpy(x->d86_mnem, "mwaitx", OPLEN); in dtrace_disx86()
4937 (void) strncpy(x->d86_mnem, "clzero", OPLEN); in dtrace_disx86()
4945 /* prefetch instruction - memory operand, but no memory acess */ in dtrace_disx86()
4983 (void) strncpy(x->d86_mnem, vminstr, OPLEN); in dtrace_disx86()
5025 (void) strncpy(x->d86_mnem, vinstr, OPLEN); in dtrace_disx86()
5035 (void) strncpy(x->d86_mnem, "monitor", OPLEN); in dtrace_disx86()
5041 (void) strncpy(x->d86_mnem, "mwait", OPLEN); in dtrace_disx86()
5047 (void) strncpy(x->d86_mnem, "clac", OPLEN); in dtrace_disx86()
5053 (void) strncpy(x->d86_mnem, "stac", OPLEN); in dtrace_disx86()
5066 (void) strncpy(x->d86_mnem, "xgetbv", OPLEN); in dtrace_disx86()
5072 (void) strncpy(x->d86_mnem, "xsetbv", OPLEN); in dtrace_disx86()
5121 dtrace_get_operand(x, REG_ONLY, r_m, LONG_OPND, 1 - vbit); in dtrace_disx86()
5153 * bits 3-4 of op code byte in dtrace_disx86()
5157 reg = (x->d86_bytes[x->d86_len - 1] >> 3) & 0x3; in dtrace_disx86()
5163 * bits 3-5 of op code in dtrace_disx86()
5168 reg = (x->d86_bytes[x->d86_len - 1] >> 3) & 0x7; in dtrace_disx86()
5175 x->d86_got_modrm = 1; in dtrace_disx86()
5183 x->d86_got_modrm = 1; in dtrace_disx86()
5188 /* MMX/SIMD-Int memory or mm reg to mm reg */ in dtrace_disx86()
5192 wbit = strcmp(dp->it_name, "movd") ? MM_OPND : LONG_OPND; in dtrace_disx86()
5201 wbit = strcmp(dp->it_name, "movd") ? MM_OPND : LONG_OPND; in dtrace_disx86()
5215 /* MMX/SIMD-Int and SIMD-FP predicated mm reg to r32 */ in dtrace_disx86()
5236 /* MMX/SIMD-Int predicated r32/mem to mm reg */ in dtrace_disx86()
5249 /* MMX/SIMD-Int predicated mm/mem to mm reg */ in dtrace_disx86()
5255 /* MMX/SIMD-Int mm reg to r32 */ in dtrace_disx86()
5274 if (dp->it_adrmode == XMMXIMPL && mode != REG_ONLY) in dtrace_disx86()
5284 if (strcmp(dp->it_name, "movlps") == 0) in dtrace_disx86()
5285 (void) strncpy(x->d86_mnem, "movhlps", OPLEN); in dtrace_disx86()
5286 else if (strcmp(dp->it_name, "movhps") == 0) in dtrace_disx86()
5287 (void) strncpy(x->d86_mnem, "movlhps", OPLEN); in dtrace_disx86()
5290 if (dp->it_adrmode == XMMXIMPL) in dtrace_disx86()
5301 if ((strcmp(dp->it_name, "movlps") == 0 || in dtrace_disx86()
5302 strcmp(dp->it_name, "movhps") == 0 || in dtrace_disx86()
5303 strcmp(dp->it_name, "movntps") == 0) && in dtrace_disx86()
5319 if (strcmp(dp->it_name, "movhps") == 0) in dtrace_disx86()
5320 (void) strncpy(x->d86_mnem, "movlhps", OPLEN); in dtrace_disx86()
5390 if (dp->it_name[0] == 'c' && in dtrace_disx86()
5391 dp->it_name[1] == 'm' && in dtrace_disx86()
5392 dp->it_name[2] == 'p' && in dtrace_disx86()
5393 strlen(dp->it_name) == 5) { in dtrace_disx86()
5394 uchar_t pred = x->d86_opnd[0].d86_value & 0xff; in dtrace_disx86()
5399 (void) strncpy(x->d86_mnem, "cmp", OPLEN); in dtrace_disx86()
5400 (void) strlcat(x->d86_mnem, dis_PREDSUFFIX[pred], in dtrace_disx86()
5402 (void) strlcat(x->d86_mnem, in dtrace_disx86()
5403 dp->it_name + strlen(dp->it_name) - 2, in dtrace_disx86()
5405 x->d86_opnd[0] = x->d86_opnd[1]; in dtrace_disx86()
5406 x->d86_opnd[1] = x->d86_opnd[2]; in dtrace_disx86()
5407 x->d86_numopnds = 2; in dtrace_disx86()
5416 if (strcmp(dp->it_name, "pclmulqdq") == 0) { in dtrace_disx86()
5418 switch (x->d86_opnd[0].d86_value) { in dtrace_disx86()
5420 (void) strncpy(x->d86_mnem, "pclmullqlqdq", in dtrace_disx86()
5424 (void) strncpy(x->d86_mnem, "pclmulhqlqdq", in dtrace_disx86()
5428 (void) strncpy(x->d86_mnem, "pclmullqhqdq", in dtrace_disx86()
5432 (void) strncpy(x->d86_mnem, "pclmulhqhqdq", in dtrace_disx86()
5441 x->d86_opnd[0].d86_value_size = 0; in dtrace_disx86()
5442 x->d86_opnd[0] = x->d86_opnd[1]; in dtrace_disx86()
5443 x->d86_opnd[1] = x->d86_opnd[2]; in dtrace_disx86()
5444 x->d86_numopnds = 2; in dtrace_disx86()
5480 x->d86_numopnds = 2; in dtrace_disx86()
5482 (void) strlcat(x->d86_opnd[0].d86_opnd, "(%rsi)", in dtrace_disx86()
5484 (void) strlcat(x->d86_opnd[1].d86_opnd, "(%rdi)", in dtrace_disx86()
5487 (void) strlcat(x->d86_opnd[0].d86_opnd, "(%esi)", in dtrace_disx86()
5489 (void) strlcat(x->d86_opnd[1].d86_opnd, "(%edi)", in dtrace_disx86()
5492 (void) strlcat(x->d86_opnd[0].d86_opnd, "(%si)", in dtrace_disx86()
5494 (void) strlcat(x->d86_opnd[1].d86_opnd, "(%di)", in dtrace_disx86()
5506 x->d86_numopnds = 2; in dtrace_disx86()
5509 (void) strlcat(x->d86_opnd[1].d86_opnd, "(%rdi)", in dtrace_disx86()
5512 (void) strlcat(x->d86_opnd[1].d86_opnd, "(%edi)", in dtrace_disx86()
5515 (void) strlcat(x->d86_opnd[1].d86_opnd, "(%di)", in dtrace_disx86()
5525 x->d86_numopnds = 2; in dtrace_disx86()
5527 (void) strlcat(x->d86_opnd[0].d86_opnd, "(%rsi)", in dtrace_disx86()
5530 (void) strlcat(x->d86_opnd[0].d86_opnd, "(%esi)", in dtrace_disx86()
5533 (void) strlcat(x->d86_opnd[0].d86_opnd, "(%si)", in dtrace_disx86()
5551 (void) strlcat(x->d86_opnd[0].d86_prefix, "*", OPLEN); in dtrace_disx86()
5559 * for long jumps and long calls -- a new code segment in dtrace_disx86()
5560 * register and an offset in IP -- stored in object in dtrace_disx86()
5561 * code in reverse order. Note - not valid in amd64 in dtrace_disx86()
5568 x->d86_opnd[1].d86_mode = MODE_SIGNED; in dtrace_disx86()
5601 x->d86_memsize = (x->d86_opnd[1].d86_value + 1) * 8; in dtrace_disx86()
5604 x->d86_memsize = (x->d86_opnd[1].d86_value + 1) * 4; in dtrace_disx86()
5607 x->d86_memsize = (x->d86_opnd[1].d86_value + 1) * 2; in dtrace_disx86()
5613 /* 16-bit immediate operand */ in dtrace_disx86()
5628 x->d86_numopnds = 1; in dtrace_disx86()
5631 (void) strlcat(x->d86_opnd[0].d86_opnd, "(%dx)", OPLEN); in dtrace_disx86()
5647 x->d86_numopnds = 1; in dtrace_disx86()
5648 x->d86_opnd[0].d86_mode = MODE_SIGNED; in dtrace_disx86()
5649 x->d86_opnd[0].d86_value_size = 1; in dtrace_disx86()
5650 x->d86_opnd[0].d86_value = 3; in dtrace_disx86()
5663 if (x->d86_get_byte(x->d86_data) < 0) in dtrace_disx86()
5665 x->d86_len++; in dtrace_disx86()
5672 (void) strlcat(x->d86_mnem, "cbtw", OPLEN); in dtrace_disx86()
5674 (void) strlcat(x->d86_mnem, "cwtl", OPLEN); in dtrace_disx86()
5676 (void) strlcat(x->d86_mnem, "cltq", OPLEN); in dtrace_disx86()
5685 (void) strlcat(x->d86_mnem, "cwtd", OPLEN); in dtrace_disx86()
5687 (void) strlcat(x->d86_mnem, "cltd", OPLEN); in dtrace_disx86()
5689 (void) strlcat(x->d86_mnem, "cqtd", OPLEN); in dtrace_disx86()
5706 (void) strlcat(x->d86_mnem, "clflushopt", in dtrace_disx86()
5711 (void) strlcat(x->d86_mnem, "clflush", OPLEN); in dtrace_disx86()
5723 (void) strlcat(x->d86_mnem, "sfence", OPLEN); in dtrace_disx86()
5747 if (dp->it_invalid32 && cpu_mode != SIZE64) in dtrace_disx86()
5768 if ((uint8_t)x->d86_bytes[x->d86_len - 1] != 0xe8 && in dtrace_disx86()
5769 (uint8_t)x->d86_bytes[x->d86_len - 1] != 0xf0) in dtrace_disx86()
5774 (void) strncpy(x->d86_mnem, "xrstor", OPLEN); in dtrace_disx86()
5777 (void) strncpy(x->d86_mnem, "clwb", in dtrace_disx86()
5780 (void) strncpy(x->d86_mnem, "xsaveopt", in dtrace_disx86()
5798 x->d86_numopnds = 1; in dtrace_disx86()
5799 (void) strlcat(x->d86_opnd[0].d86_opnd, "%st(X)", OPLEN); in dtrace_disx86()
5800 x->d86_opnd[0].d86_opnd[4] = r_m + '0'; in dtrace_disx86()
5807 vbit = opcode2 >> 2 & 0x1; /* vbit = 1: st -> st(i) */ in dtrace_disx86()
5811 x->d86_numopnds = 2; in dtrace_disx86()
5812 (void) strlcat(x->d86_opnd[1 - vbit].d86_opnd, "%st", OPLEN); in dtrace_disx86()
5813 (void) strlcat(x->d86_opnd[vbit].d86_opnd, "%st(X)", OPLEN); in dtrace_disx86()
5814 x->d86_opnd[vbit].d86_opnd[4] = r_m + '0'; in dtrace_disx86()
5822 x->d86_numopnds = 1; in dtrace_disx86()
5826 (void) strncpy(x->d86_mnem, "vstmxcsr", OPLEN); in dtrace_disx86()
5834 x->d86_numopnds = 3; in dtrace_disx86()
5847 if (dp->it_adrmode == FMA) { in dtrace_disx86()
5848 size_t len = strlen(dp->it_name); in dtrace_disx86()
5849 (void) strncpy(x->d86_mnem, dp->it_name, OPLEN); in dtrace_disx86()
5851 (void) strncpy(x->d86_mnem + len, in dtrace_disx86()
5852 vex_W != 0 ? "d" : "s", OPLEN - len); in dtrace_disx86()
5862 x->d86_numopnds = 2; in dtrace_disx86()
5872 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1); in dtrace_disx86()
5885 (void) strncpy(x->d86_mnem, "vmovlhps", OPLEN); in dtrace_disx86()
5888 (void) strncpy(x->d86_mnem, "vmovhlps", OPLEN); in dtrace_disx86()
5897 x->d86_numopnds = 3; in dtrace_disx86()
5906 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 0); in dtrace_disx86()
5913 x->d86_numopnds = 3; in dtrace_disx86()
5914 x->d86_vsib = 1; in dtrace_disx86()
5924 (void) strncpy(x->d86_mnem, dp->it_name, OPLEN); in dtrace_disx86()
5925 (void) strlcat(x->d86_mnem + strlen(dp->it_name), in dtrace_disx86()
5926 vreg->dgr_suffix, OPLEN - strlen(dp->it_name)); in dtrace_disx86()
5932 dtrace_get_operand(x, REG_ONLY, reg, vreg->dgr_arg2, 2); in dtrace_disx86()
5937 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), vreg->dgr_arg0, in dtrace_disx86()
5939 dtrace_get_operand(x, mode, r_m, vreg->dgr_arg1, 1); in dtrace_disx86()
5944 x->d86_numopnds = 3; in dtrace_disx86()
5954 x->d86_numopnds = 2; in dtrace_disx86()
5960 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1); in dtrace_disx86()
5966 x->d86_numopnds = 4; in dtrace_disx86()
5971 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 2); in dtrace_disx86()
5984 x->d86_mnem[6] = 'q'; in dtrace_disx86()
5999 int regnum = (x->d86_opnd[0].d86_value & 0xF0) >> 4; in dtrace_disx86()
6001 x->d86_opnd[0].d86_mode = MODE_NONE; in dtrace_disx86()
6004 (void) strncpy(x->d86_opnd[0].d86_opnd, in dtrace_disx86()
6007 (void) strncpy(x->d86_opnd[0].d86_opnd, in dtrace_disx86()
6015 x->d86_numopnds = 2; in dtrace_disx86()
6048 x->d86_mnem[4] = 'q'; in dtrace_disx86()
6061 x->d86_numopnds = 3; in dtrace_disx86()
6075 x->d86_numopnds = 3; in dtrace_disx86()
6079 (void) strncpy(x->d86_mnem, dis_AVXvgrp7[opcode2 - 1][reg], in dtrace_disx86()
6084 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 2); in dtrace_disx86()
6095 x->d86_numopnds = 2; in dtrace_disx86()
6098 x->d86_numopnds = 2; in dtrace_disx86()
6105 dtrace_get_operand(x, mode, r_m, wbit, vbit - 1); in dtrace_disx86()
6114 x->d86_numopnds = 2; in dtrace_disx86()
6123 x->d86_numopnds = 2; in dtrace_disx86()
6136 x->d86_numopnds = 2; in dtrace_disx86()
6145 x->d86_numopnds = 2; in dtrace_disx86()
6158 x->d86_numopnds = 3; in dtrace_disx86()
6171 x->d86_numopnds = 2; in dtrace_disx86()
6181 x->d86_numopnds = 2; in dtrace_disx86()
6190 x->d86_mnem[4] = 'q'; in dtrace_disx86()
6201 x->d86_numopnds = 3; in dtrace_disx86()
6210 x->d86_mnem[6] = 'q'; in dtrace_disx86()
6221 x->d86_numopnds = 3; in dtrace_disx86()
6235 x->d86_numopnds = 3; in dtrace_disx86()
6246 x->d86_numopnds = 2; in dtrace_disx86()
6253 dtrace_get_operand(x, REG_ONLY, reg, wbit, vbit - 1); in dtrace_disx86()
6259 x->d86_numopnds = 3; in dtrace_disx86()
6265 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1); in dtrace_disx86()
6271 x->d86_numopnds = 3; in dtrace_disx86()
6276 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1); in dtrace_disx86()
6283 (void) strncpy(x->d86_mnem, "vzeroall", OPLEN); in dtrace_disx86()
6291 * and like everything else, they use the bits in 3-5 of the in dtrace_disx86()
6320 x->d86_numopnds = 2; in dtrace_disx86()
6322 (void) strncpy(x->d86_mnem, blsinstr, OPLEN); in dtrace_disx86()
6324 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1); in dtrace_disx86()
6330 x->d86_numopnds = 2; in dtrace_disx86()
6333 evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff; in dtrace_disx86()
6344 x->d86_numopnds = 2; in dtrace_disx86()
6347 evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff; in dtrace_disx86()
6358 x->d86_numopnds = 3; in dtrace_disx86()
6361 evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff; in dtrace_disx86()
6371 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1); in dtrace_disx86()
6378 x->d86_numopnds = 4; in dtrace_disx86()
6382 evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff; in dtrace_disx86()
6392 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 2); in dtrace_disx86()
6409 if (x->d86_error) in dtrace_disx86()
6417 if (x->d86_memsize != 0) { in dtrace_disx86()
6419 } else if (dp->it_stackop) { in dtrace_disx86()
6422 x->d86_memsize = 2; in dtrace_disx86()
6425 x->d86_memsize = 4; in dtrace_disx86()
6428 x->d86_memsize = 8; in dtrace_disx86()
6432 x->d86_memsize = 0; in dtrace_disx86()
6434 } else if (dp->it_size != 0) { in dtrace_disx86()
6439 if (x->d86_mode == SIZE64 && dp->it_size == 6) in dtrace_disx86()
6440 x->d86_memsize = 10; in dtrace_disx86()
6441 else if (x->d86_mode == SIZE64 && opcode1 == 0x9 && in dtrace_disx86()
6443 x->d86_memsize = 8; in dtrace_disx86()
6445 x->d86_memsize = dp->it_size; in dtrace_disx86()
6448 x->d86_memsize = 1; in dtrace_disx86()
6452 x->d86_memsize = 8; in dtrace_disx86()
6454 x->d86_memsize = 4; in dtrace_disx86()
6456 x->d86_memsize = 2; in dtrace_disx86()
6459 x->d86_memsize = 4; in dtrace_disx86()
6462 x->d86_memsize = 8; in dtrace_disx86()
6469 (void) strlcat(x->d86_mnem, "undef", OPLEN); in dtrace_disx86()
6498 where = opcode + strlen(opcode) - 1; in isunsigned_op()
6500 --where; in isunsigned_op()
6518 * if it's a negative displacement of any magnitude, print as -<absval>.
6527 #define NEG_LIMIT -255
6537 int octal = dis->d86_flags & DIS_F_OCTAL; in print_imm()
6543 !isunsigned_op(dis->d86_mnem)) { in print_imm()
6544 dis->d86_sprintf_func(buf + curlen, buflen - curlen, in print_imm()
6545 octal ? "-0%llo" : "-0x%llx", (-sv) & mask); in print_imm()
6549 dis->d86_sprintf_func(buf + curlen, buflen - curlen, in print_imm()
6552 dis->d86_sprintf_func(buf + curlen, buflen - curlen, in print_imm()
6588 dis->d86_sprintf_func(buf, buflen, "%-6s ", dis->d86_mnem); in dtrace_disx86_str()
6591 * For PC-relative jumps, the pc is really the next pc after executing in dtrace_disx86_str()
6594 pc += dis->d86_len; in dtrace_disx86_str()
6596 for (i = 0; i < dis->d86_numopnds; i++) { in dtrace_disx86_str()
6597 d86opnd_t *op = &dis->d86_opnd[i]; in dtrace_disx86_str()
6602 (void) strlcat(buf, op->d86_prefix, buflen); in dtrace_disx86_str()
6605 * sv is for the signed, possibly-truncated immediate or in dtrace_disx86_str()
6610 sv = usv = op->d86_value; in dtrace_disx86_str()
6623 mask = masks[dis->d86_addr_size]; in dtrace_disx86_str()
6626 if (op->d86_mode == MODE_SIGNED || in dtrace_disx86_str()
6627 op->d86_mode == MODE_IMPLIED) in dtrace_disx86_str()
6628 mask = masks[log2(op->d86_value_size)]; in dtrace_disx86_str()
6630 switch (op->d86_mode) { in dtrace_disx86_str()
6634 (void) strlcat(buf, op->d86_opnd, buflen); in dtrace_disx86_str()
6643 if (dis->d86_seg_prefix) in dtrace_disx86_str()
6644 (void) strlcat(buf, dis->d86_seg_prefix, in dtrace_disx86_str()
6647 if (op->d86_mode == MODE_SIGNED || in dtrace_disx86_str()
6648 op->d86_mode == MODE_IMPLIED) { in dtrace_disx86_str()
6654 (op->d86_mode == MODE_SIGNED || in dtrace_disx86_str()
6655 op->d86_mode == MODE_IMPLIED)) { in dtrace_disx86_str()
6668 (void) strlcat(buf, op->d86_opnd, buflen); in dtrace_disx86_str()
6688 if (op->d86_mode == MODE_RIPREL) in dtrace_disx86_str()
6697 * the 0-relative non-relocated addresses of symbols. in dtrace_disx86_str()
6700 lookup = dis->d86_sym_lookup; in dtrace_disx86_str()
6702 if ((dis->d86_flags & DIS_F_NOIMMSYM) == 0 && in dtrace_disx86_str()
6703 lookup(dis->d86_data, tgt, NULL, 0) == 0) { in dtrace_disx86_str()
6706 lookup(dis->d86_data, tgt, buf + curlen, in dtrace_disx86_str()
6707 buflen - curlen); in dtrace_disx86_str()
6728 lookup(dis->d86_data, reltgt, buf + curlen, in dtrace_disx86_str()
6729 buflen - curlen); in dtrace_disx86_str()