1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
58 	uint32_t	bank;  member
66 	uint32_t	bank;  member
73 	uint32_t	bank;  member
75 	uint32_t	pin;  member
82 	uint32_t	bank;  member
114 #define	RK_PINCTRL_LOCK(_sc)		mtx_lock_spin(&(_sc)->mtx)
115 #define	RK_PINCTRL_UNLOCK(_sc)		mtx_unlock_spin(&(_sc)->mtx)
116 #define	RK_PINCTRL_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)
120 	.bank = _bank,							\
128 	.bank = _bank,							\
129 	.pin = _pin,							\
137 	.bank = _bank,							\
145 	.bank = _bank,							\
162 	/*    bank sub  offs   nbits */
181 	/* 5,0 - Empty */
184 	/* 5,3 - Empty */
188 	/* 6,3 - Empty */
192 	/* 7,3 - Empty */
195 	/* 8,2 - Empty */
196 	/* 8,3 - Empty */
204 	/*       bank sub offs val ma */
363 rk3288_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3288_get_pd_offset()  argument
365 	if (bank == 0)  in rk3288_get_pd_offset()
371 rk3288_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3288_get_syscon()  argument
373 	if (bank == 0)  in rk3288_get_syscon()
374 		return (sc->pmu);  in rk3288_get_syscon()
375 	return (sc->grf);  in rk3288_get_syscon()
379 rk3288_parse_bias(phandle_t node, int bank)  in rk3288_parse_bias()  argument
381 	if (OF_hasprop(node, "bias-disable"))  in rk3288_parse_bias()
383 	if (OF_hasprop(node, "bias-pull-up"))  in rk3288_parse_bias()
385 	if (OF_hasprop(node, "bias-pull-down"))  in rk3288_parse_bias()
388 	return (-1);  in rk3288_parse_bias()
392 rk3288_resolv_bias_value(int bank, int bias)  in rk3288_resolv_bias_value()  argument
405 rk3288_get_bias_value(int bank, int bias)  in rk3288_get_bias_value()  argument
441 	/*    bank sub offs nbits */
461 	/*      bank  pin reg  bit  mask */
468 	/*       bank sub  offs val ma */
551 rk3328_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3328_get_pd_offset()  argument
557 rk3328_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3328_get_syscon()  argument
559 	return (sc->grf);  in rk3328_get_syscon()
587 	/*    bank sub  offs   nbits */
613 	/*       bank sub offs val ma */
652 rk3399_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3399_get_pd_offset()  argument
654 	if (bank < 2)  in rk3399_get_pd_offset()
661 rk3399_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3399_get_syscon()  argument
663 	if (bank < 2)  in rk3399_get_syscon()
664 		return (sc->pmu);  in rk3399_get_syscon()
666 	return (sc->grf);  in rk3399_get_syscon()
670 rk3399_parse_bias(phandle_t node, int bank)  in rk3399_parse_bias()  argument
674 	if (OF_hasprop(node, "bias-disable"))  in rk3399_parse_bias()
677 	switch (bank) {  in rk3399_parse_bias()
691 	if (OF_hasprop(node, "bias-pull-up"))  in rk3399_parse_bias()
693 	if (OF_hasprop(node, "bias-pull-down"))  in rk3399_parse_bias()
696 	return (-1);  in rk3399_parse_bias()
700 rk3399_resolv_bias_value(int bank, int bias)  in rk3399_resolv_bias_value()  argument
704 	switch (bank) {  in rk3399_resolv_bias_value()
726 rk3399_get_bias_value(int bank, int bias)  in rk3399_get_bias_value()  argument
730 	switch (bank) {  in rk3399_get_bias_value()
780 	/*    bank sub  offs   nbits */
807 	/*       bank sub offs val ma */
930 rk3568_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3568_get_pd_offset()  argument
933 	if (bank == 0)  in rk3568_get_pd_offset()
937 	 * Registers start at 0x80, but bank index starts at 1. Return 0x70  in rk3568_get_pd_offset()
944 rk3568_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)  in rk3568_get_syscon()  argument
947 	if (bank)  in rk3568_get_syscon()
948 		return (sc->grf);  in rk3568_get_syscon()
950 		return (sc->pmu);  in rk3568_get_syscon()
954 rk3568_parse_bias(phandle_t node, int bank)  in rk3568_parse_bias()  argument
957 	if (OF_hasprop(node, "bias-disable"))  in rk3568_parse_bias()
959 	if (OF_hasprop(node, "bias-pull-up"))  in rk3568_parse_bias()
961 	if (OF_hasprop(node, "bias-pull-down"))  in rk3568_parse_bias()
963 	return (-1);  in rk3568_parse_bias()
967 rk3568_resolv_bias_value(int bank, int bias)  in rk3568_resolv_bias_value()  argument
978 rk3568_get_bias_value(int bank, int bias)  in rk3568_get_bias_value()  argument
1005 	{"rockchip,rk3288-pinctrl", (uintptr_t)&rk3288_conf},
1006 	{"rockchip,rk3328-pinctrl", (uintptr_t)&rk3328_conf},
1007 	{"rockchip,rk3399-pinctrl", (uintptr_t)&rk3399_conf},
1008 	{"rockchip,rk3568-pinctrl", (uintptr_t)&rk3568_conf},
1014   uint32_t bank, uint32_t subbank, uint32_t *drive, uint32_t *offset)  in rk_pinctrl_parse_drive()  argument
1019 	if (OF_getencprop(node, "drive-strength", &value,  in rk_pinctrl_parse_drive()
1021 		return (-1);  in rk_pinctrl_parse_drive()
1024 	for (i = 0; i < sc->conf->npin_drive; i++) {  in rk_pinctrl_parse_drive()
1025 		if (sc->conf->pin_drive[i].bank != bank &&  in rk_pinctrl_parse_drive()
1026 		    sc->conf->pin_drive[i].subbank != subbank)  in rk_pinctrl_parse_drive()
1028 		if (sc->conf->pin_drive[i].ma == value) {  in rk_pinctrl_parse_drive()
1029 			*drive = sc->conf->pin_drive[i].value;  in rk_pinctrl_parse_drive()
1034 	return (-1);  in rk_pinctrl_parse_drive()
1038 rk_pinctrl_get_fixup(struct rk_pinctrl_softc *sc, uint32_t bank, uint32_t pin,  in rk_pinctrl_get_fixup()  argument
1043 	for (i = 0; i < sc->conf->npin_fixup; i++)  in rk_pinctrl_get_fixup()
1044 		if (sc->conf->pin_fixup[i].bank == bank &&  in rk_pinctrl_get_fixup()
1045 		    sc->conf->pin_fixup[i].pin == pin) {  in rk_pinctrl_get_fixup()
1046 			*reg = sc->conf->pin_fixup[i].reg;  in rk_pinctrl_get_fixup()
1047 			*mask = sc->conf->pin_fixup[i].mask;  in rk_pinctrl_get_fixup()
1048 			*bit = sc->conf->pin_fixup[i].bit;  in rk_pinctrl_get_fixup()
1055 rk_pinctrl_handle_io(struct rk_pinctrl_softc *sc, phandle_t node, uint32_t bank,  in rk_pinctrl_handle_io()  argument
1056 uint32_t pin)  in rk_pinctrl_handle_io()  argument
1067 	/* Get (subset of) GPIO pin properties. */  in rk_pinctrl_handle_io()
1068 	if (OF_hasprop(node, "output-disable")) {  in rk_pinctrl_handle_io()
1074 	if (OF_hasprop(node, "output-enable")) {  in rk_pinctrl_handle_io()
1080 	if (OF_hasprop(node, "output-low")) {  in rk_pinctrl_handle_io()
1088 	if (OF_hasprop(node, "output-high")) {  in rk_pinctrl_handle_io()
1101 	for(i = 0; i < sc->conf->ngpio_bank; i++) {  in rk_pinctrl_handle_io()
1102 		if (bank ==  sc->conf->gpio_bank[i].bank) {  in rk_pinctrl_handle_io()
1103 			gpio = sc->conf->gpio_bank + i;  in rk_pinctrl_handle_io()
1108 		device_printf(sc->dev, "Cannot find GPIO bank %d\n", bank);  in rk_pinctrl_handle_io()
1111 	if (gpio->gpio_dev == NULL) {  in rk_pinctrl_handle_io()
1112 		device_printf(sc->dev,  in rk_pinctrl_handle_io()
1113 		    "No GPIO subdevice found for bank %d\n", bank);  in rk_pinctrl_handle_io()
1119 		rv = GPIO_PIN_SET(gpio->gpio_dev, pin, pin_value);  in rk_pinctrl_handle_io()
1121 			device_printf(sc->dev, "Cannot set GPIO value: %d\n",  in rk_pinctrl_handle_io()
1128 		rv = GPIO_PIN_SETFLAGS(gpio->gpio_dev, pin, direction_value);  in rk_pinctrl_handle_io()
1130 			device_printf(sc->dev,  in rk_pinctrl_handle_io()
1144 	uint32_t bank, subbank, pin, function;  in rk_pinctrl_configure_pin()  local
1148 	bank = pindata[0];  in rk_pinctrl_configure_pin()
1149 	pin = pindata[1];  in rk_pinctrl_configure_pin()
1152 	subbank = pin / 8;  in rk_pinctrl_configure_pin()
1154 	for (i = 0; i < sc->conf->iomux_nbanks; i++)  in rk_pinctrl_configure_pin()
1155 		if (sc->conf->iomux_conf[i].bank == bank &&  in rk_pinctrl_configure_pin()
1156 		    sc->conf->iomux_conf[i].subbank == subbank)  in rk_pinctrl_configure_pin()
1159 	if (i == sc->conf->iomux_nbanks) {  in rk_pinctrl_configure_pin()
1160 		device_printf(sc->dev, "Unknown pin %d in bank %d\n", pin,  in rk_pinctrl_configure_pin()
1161 		    bank);  in rk_pinctrl_configure_pin()
1166 	syscon = sc->conf->get_syscon(sc, bank);  in rk_pinctrl_configure_pin()
1169 	rv = rk_pinctrl_handle_io(sc, pin_conf, bank, pin);  in rk_pinctrl_configure_pin()
1171 	/* Then pin pull-up/down */  in rk_pinctrl_configure_pin()
1172 	bias = sc->conf->parse_bias(pin_conf, bank);  in rk_pinctrl_configure_pin()
1174 		reg = sc->conf->get_pd_offset(sc, bank);  in rk_pinctrl_configure_pin()
1175 		reg += bank * 0x10 + ((pin / 8) * 0x4);  in rk_pinctrl_configure_pin()
1176 		bit = (pin % 8) * 2;  in rk_pinctrl_configure_pin()
1182 	if (ofw_bus_node_is_compatible(ofw_bus_get_node(sc->dev),  in rk_pinctrl_configure_pin()
1183 	    "rockchip,rk3568-pinctrl")) {  in rk_pinctrl_configure_pin()
1185 		if (OF_getencprop(pin_conf, "drive-strength", &value,  in rk_pinctrl_configure_pin()
1187 			if (bank)  in rk_pinctrl_configure_pin()
1188 				reg = 0x01c0 + (bank * 0x40) + (pin / 2 * 4);  in rk_pinctrl_configure_pin()
1190 				reg = 0x0070 + (pin / 2 * 4);  in rk_pinctrl_configure_pin()
1192 			drive = ((1 << (value + 1)) - 1) << (pin % 2);  in rk_pinctrl_configure_pin()
1194 			mask = 0x3f << (pin % 2);  in rk_pinctrl_configure_pin()
1199 		rv = rk_pinctrl_parse_drive(sc, pin_conf, bank, subbank, &drive,  in rk_pinctrl_configure_pin()
1202 			bit = (pin % 8) * 2;  in rk_pinctrl_configure_pin()
1209 	/* Finally set the pin function */  in rk_pinctrl_configure_pin()
1210 	reg = sc->conf->iomux_conf[i].offset;  in rk_pinctrl_configure_pin()
1211 	switch (sc->conf->iomux_conf[i].nbits) {  in rk_pinctrl_configure_pin()
1213 		if ((pin % 8) >= 4)  in rk_pinctrl_configure_pin()
1215 		bit = (pin % 4) * 4;  in rk_pinctrl_configure_pin()
1219 		if ((pin % 8) >= 5)  in rk_pinctrl_configure_pin()
1221 		bit = (pin % 8 % 5) * 3;  in rk_pinctrl_configure_pin()
1225 		bit = (pin % 8) * 2;  in rk_pinctrl_configure_pin()
1229 		device_printf(sc->dev,  in rk_pinctrl_configure_pin()
1230 		    "Unknown pin stride width %d in bank %d\n",  in rk_pinctrl_configure_pin()
1231 		    sc->conf->iomux_conf[i].nbits, bank);  in rk_pinctrl_configure_pin()
1234 	rk_pinctrl_get_fixup(sc, bank, pin, &reg, &mask, &bit);  in rk_pinctrl_configure_pin()
1237 	 * NOTE: not all syscon registers uses hi-word write mask, thus  in rk_pinctrl_configure_pin()
1240 	 * without hi-word write mask.  in rk_pinctrl_configure_pin()
1244 	/* RK3568 specific pin mux for various functionalities */  in rk_pinctrl_configure_pin()
1245 	if (ofw_bus_node_is_compatible(ofw_bus_get_node(sc->dev),  in rk_pinctrl_configure_pin()
1246 	    "rockchip,rk3568-pinctrl")) {  in rk_pinctrl_configure_pin()
1247 		if (bank == 3 && pin == 9 && function == 3)  in rk_pinctrl_configure_pin()
1248 			SYSCON_WRITE_4(sc->grf,  in rk_pinctrl_configure_pin()
1250 		if (bank == 4 && pin == 7 && function == 3)  in rk_pinctrl_configure_pin()
1251 			SYSCON_WRITE_4(sc->grf,  in rk_pinctrl_configure_pin()
1280   int bank, uint32_t pin, bool *is_gpio)  in rk_pinctrl_is_gpio_locked()  argument
1288 	subbank = pin / 8;  in rk_pinctrl_is_gpio_locked()
1291 	for (i = 0; i < sc->conf->iomux_nbanks; i++)  in rk_pinctrl_is_gpio_locked()
1292 		if (sc->conf->iomux_conf[i].bank == bank &&  in rk_pinctrl_is_gpio_locked()
1293 		    sc->conf->iomux_conf[i].subbank == subbank)  in rk_pinctrl_is_gpio_locked()
1296 	if (i == sc->conf->iomux_nbanks) {  in rk_pinctrl_is_gpio_locked()
1297 		device_printf(sc->dev, "Unknown pin %d in bank %d\n", pin,  in rk_pinctrl_is_gpio_locked()
1298 		    bank);  in rk_pinctrl_is_gpio_locked()
1302 	syscon = sc->conf->get_syscon(sc, bank);  in rk_pinctrl_is_gpio_locked()
1304 	/* Parse pin function */  in rk_pinctrl_is_gpio_locked()
1305 	reg = sc->conf->iomux_conf[i].offset;  in rk_pinctrl_is_gpio_locked()
1306 	switch (sc->conf->iomux_conf[i].nbits) {  in rk_pinctrl_is_gpio_locked()
1308 		if ((pin % 8) >= 4)  in rk_pinctrl_is_gpio_locked()
1310 		bit = (pin % 4) * 4;  in rk_pinctrl_is_gpio_locked()
1314 		if ((pin % 8) >= 5)  in rk_pinctrl_is_gpio_locked()
1316 		bit = (pin % 8 % 5) * 3;  in rk_pinctrl_is_gpio_locked()
1320 		bit = (pin % 8) * 2;  in rk_pinctrl_is_gpio_locked()
1324 		device_printf(sc->dev,  in rk_pinctrl_is_gpio_locked()
1325 		    "Unknown pin stride width %d in bank %d\n",  in rk_pinctrl_is_gpio_locked()
1326 		    sc->conf->iomux_conf[i].nbits, bank);  in rk_pinctrl_is_gpio_locked()
1329 	rk_pinctrl_get_fixup(sc, bank, pin, &reg, &mask, &bit);  in rk_pinctrl_is_gpio_locked()
1334 	/* Test if the pin is in gpio mode */  in rk_pinctrl_is_gpio_locked()
1342 rk_pinctrl_get_bank(struct rk_pinctrl_softc *sc, device_t gpio, int *bank)  in rk_pinctrl_get_bank()  argument
1346 	for (i = 0; i < sc->conf->ngpio_bank; i++) {  in rk_pinctrl_get_bank()
1347 		if (sc->conf->gpio_bank[i].gpio_dev == gpio)  in rk_pinctrl_get_bank()
1350 	if (i == sc->conf->ngpio_bank)  in rk_pinctrl_get_bank()
1353 	*bank = i;  in rk_pinctrl_get_bank()
1358 rk_pinctrl_is_gpio(device_t pinctrl, device_t gpio, uint32_t pin, bool *is_gpio)  in rk_pinctrl_is_gpio()  argument
1362 	int bank;  in rk_pinctrl_is_gpio()  local
1368 	rv = rk_pinctrl_get_bank(sc, gpio, &bank);  in rk_pinctrl_is_gpio()
1371 	syscon = sc->conf->get_syscon(sc, bank);  in rk_pinctrl_is_gpio()
1372 	rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, is_gpio);  in rk_pinctrl_is_gpio()
1381 rk_pinctrl_get_flags(device_t pinctrl, device_t gpio, uint32_t pin,  in rk_pinctrl_get_flags()  argument
1388 	int bank;  in rk_pinctrl_get_flags()  local
1395 	rv = rk_pinctrl_get_bank(sc, gpio, &bank);  in rk_pinctrl_get_flags()
1398 	syscon = sc->conf->get_syscon(sc, bank);  in rk_pinctrl_get_flags()
1399 	rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, &is_gpio);  in rk_pinctrl_get_flags()
1407 	reg = sc->conf->get_pd_offset(sc, bank);  in rk_pinctrl_get_flags()
1408 	reg += bank * 0x10 + ((pin / 8) * 0x4);  in rk_pinctrl_get_flags()
1409 	bit = (pin % 8) * 2;  in rk_pinctrl_get_flags()
1412 	bias = sc->conf->resolv_bias_value(bank, reg);  in rk_pinctrl_get_flags()
1421 rk_pinctrl_set_flags(device_t pinctrl, device_t gpio, uint32_t pin,  in rk_pinctrl_set_flags()  argument
1428 	int bank;  in rk_pinctrl_set_flags()  local
1435 	rv = rk_pinctrl_get_bank(sc, gpio, &bank);  in rk_pinctrl_set_flags()
1438 	syscon = sc->conf->get_syscon(sc, bank);  in rk_pinctrl_set_flags()
1439 	rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, &is_gpio);  in rk_pinctrl_set_flags()
1447 	reg = sc->conf->get_pd_offset(sc, bank);  in rk_pinctrl_set_flags()
1448 	reg += bank * 0x10 + ((pin / 8) * 0x4);  in rk_pinctrl_set_flags()
1449 	bit = (pin % 8) * 2;  in rk_pinctrl_set_flags()
1451 	bias = sc->conf->get_bias_value(bank, flags);  in rk_pinctrl_set_flags()
1466 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)  in rk_pinctrl_probe()
1482 	sc->dev = dev;  in rk_pinctrl_attach()
1488 	    "rockchip,grf", &sc->grf) != 0) {  in rk_pinctrl_attach()
1494 	if (ofw_bus_node_is_compatible(node, "rockchip,rk3568-pinctrl") ||  in rk_pinctrl_attach()
1495 	    ofw_bus_node_is_compatible(node, "rockchip,rk3399-pinctrl") ||  in rk_pinctrl_attach()
1496 	    ofw_bus_node_is_compatible(node, "rockchip,rk3288-pinctrl")) {  in rk_pinctrl_attach()
1499 		    "rockchip,pmu", &sc->pmu) != 0) {  in rk_pinctrl_attach()
1505 	mtx_init(&sc->mtx, "rk pinctrl", "pinctrl", MTX_SPIN);  in rk_pinctrl_attach()
1507 	sc->conf = (struct rk_pinctrl_conf *)ofw_bus_search_compatible(dev,  in rk_pinctrl_attach()
1508 	    compat_data)->ocd_data;  in rk_pinctrl_attach()
1519 		if (!ofw_bus_node_is_compatible(node, "rockchip,gpio-bank"))  in rk_pinctrl_attach()
1521 		cdev = simplebus_add_device(dev, node, 0, NULL, -1, NULL);  in rk_pinctrl_attach()
1529 			device_printf(sc->dev,  in rk_pinctrl_attach()
1534 		sc->conf->gpio_bank[gpio_unit].gpio_dev = cdev;  in rk_pinctrl_attach()