Lines Matching +full:8 +full:- +full:pin
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
75 uint32_t pin; member
114 #define RK_PINCTRL_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
115 #define RK_PINCTRL_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
116 #define RK_PINCTRL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
129 .pin = _pin, \
158 RK_GPIO(8, "gpio8"),
181 /* 5,0 - Empty */
184 /* 5,3 - Empty */
188 /* 6,3 - Empty */
192 /* 7,3 - Empty */
193 RK_IOMUX(8, 0, 0x0080, 2),
194 RK_IOMUX(8, 1, 0x0084, 2),
195 /* 8,2 - Empty */
196 /* 8,3 - Empty */
208 RK_PINDRIVE(0, 0, 0x070, 2, 8),
214 RK_PINDRIVE(0, 1, 0x074, 2, 8),
220 RK_PINDRIVE(0, 2, 0x078, 2, 8),
226 RK_PINDRIVE(1, 3, 0x1CC, 2, 8),
232 RK_PINDRIVE(2, 0, 0x1D0, 2, 8),
238 RK_PINDRIVE(2, 1, 0x1D4, 2, 8),
244 RK_PINDRIVE(2, 2, 0x1D8, 2, 8),
250 RK_PINDRIVE(2, 3, 0x1DC, 2, 8),
256 RK_PINDRIVE(3, 0, 0x1E0, 2, 8),
262 RK_PINDRIVE(3, 1, 0x1E4, 2, 8),
268 RK_PINDRIVE(3, 2, 0x1E8, 2, 8),
274 RK_PINDRIVE(3, 3, 0x1EC, 2, 8),
280 RK_PINDRIVE(4, 0, 0x1F0, 2, 8),
286 RK_PINDRIVE(4, 1, 0x1F4, 2, 8),
292 RK_PINDRIVE(4, 2, 0x1F8, 2, 8),
298 RK_PINDRIVE(4, 3, 0x1FC, 2, 8),
304 RK_PINDRIVE(5, 1, 0x204, 2, 8),
310 RK_PINDRIVE(5, 2, 0x208, 2, 8),
316 RK_PINDRIVE(6, 0, 0x210, 2, 8),
322 RK_PINDRIVE(6, 1, 0x214, 2, 8),
328 RK_PINDRIVE(6, 2, 0x218, 2, 8),
334 RK_PINDRIVE(7, 0, 0x220, 2, 8),
340 RK_PINDRIVE(7, 1, 0x224, 2, 8),
346 RK_PINDRIVE(7, 2, 0x228, 2, 8),
350 RK_PINDRIVE(8, 0, 0x230, 0, 2),
351 RK_PINDRIVE(8, 0, 0x230, 1, 4),
352 RK_PINDRIVE(8, 0, 0x230, 2, 8),
353 RK_PINDRIVE(8, 0, 0x230, 3, 12),
356 RK_PINDRIVE(8, 1, 0x234, 0, 2),
357 RK_PINDRIVE(8, 1, 0x234, 1, 4),
358 RK_PINDRIVE(8, 1, 0x234, 2, 8),
359 RK_PINDRIVE(8, 1, 0x234, 3, 12),
374 return (sc->pmu); in rk3288_get_syscon()
375 return (sc->grf); in rk3288_get_syscon()
381 if (OF_hasprop(node, "bias-disable")) in rk3288_parse_bias()
383 if (OF_hasprop(node, "bias-pull-up")) in rk3288_parse_bias()
385 if (OF_hasprop(node, "bias-pull-down")) in rk3288_parse_bias()
388 return (-1); in rk3288_parse_bias()
461 /* bank pin reg bit mask */
462 RK_PINFIX(2, 12, 0x24, 8, 0x300),
471 RK_PINDRIVE(0, 0, 0x200, 2, 8),
476 RK_PINDRIVE(0, 1, 0x204, 2, 8),
481 RK_PINDRIVE(0, 2, 0x208, 2, 8),
486 RK_PINDRIVE(0, 3, 0x20C, 2, 8),
491 RK_PINDRIVE(1, 0, 0x210, 2, 8),
496 RK_PINDRIVE(1, 1, 0x214, 2, 8),
501 RK_PINDRIVE(1, 2, 0x218, 2, 8),
506 RK_PINDRIVE(1, 3, 0x21C, 2, 8),
511 RK_PINDRIVE(2, 0, 0x220, 2, 8),
516 RK_PINDRIVE(2, 1, 0x224, 2, 8),
521 RK_PINDRIVE(2, 2, 0x228, 2, 8),
526 RK_PINDRIVE(2, 3, 0x22C, 2, 8),
531 RK_PINDRIVE(3, 0, 0x230, 2, 8),
536 RK_PINDRIVE(3, 1, 0x234, 2, 8),
541 RK_PINDRIVE(3, 2, 0x238, 2, 8),
546 RK_PINDRIVE(3, 3, 0x23C, 2, 8),
559 return (sc->grf); in rk3328_get_syscon()
664 return (sc->pmu); in rk3399_get_syscon()
666 return (sc->grf); in rk3399_get_syscon()
674 if (OF_hasprop(node, "bias-disable")) in rk3399_parse_bias()
691 if (OF_hasprop(node, "bias-pull-up")) in rk3399_parse_bias()
693 if (OF_hasprop(node, "bias-pull-down")) in rk3399_parse_bias()
696 return (-1); in rk3399_parse_bias()
811 RK_PINDRIVE(0, 0, 0x0020, 2, 8),
817 RK_PINDRIVE(0, 1, 0x0024, 2, 8),
823 RK_PINDRIVE(0, 1, 0x0028, 2, 8),
829 RK_PINDRIVE(0, 1, 0x002c, 2, 8),
835 RK_PINDRIVE(1, 0, 0x0080, 2, 8),
841 RK_PINDRIVE(1, 1, 0x0084, 2, 8),
847 RK_PINDRIVE(1, 2, 0x0088, 2, 8),
853 RK_PINDRIVE(1, 3, 0x008c, 2, 8),
859 RK_PINDRIVE(2, 0, 0x0090, 2, 8),
865 RK_PINDRIVE(2, 1, 0x0094, 2, 8),
871 RK_PINDRIVE(2, 2, 0x0098, 2, 8),
877 RK_PINDRIVE(2, 3, 0x009c, 2, 8),
883 RK_PINDRIVE(3, 0, 0x00a0, 2, 8),
889 RK_PINDRIVE(3, 1, 0x00a4, 2, 8),
895 RK_PINDRIVE(3, 2, 0x00a8, 2, 8),
901 RK_PINDRIVE(3, 3, 0x00ac, 2, 8),
907 RK_PINDRIVE(4, 0, 0x00b0, 2, 8),
913 RK_PINDRIVE(4, 1, 0x00b4, 2, 8),
919 RK_PINDRIVE(4, 2, 0x00b8, 2, 8),
925 RK_PINDRIVE(4, 3, 0x00bc, 2, 8),
948 return (sc->grf); in rk3568_get_syscon()
950 return (sc->pmu); in rk3568_get_syscon()
957 if (OF_hasprop(node, "bias-disable")) in rk3568_parse_bias()
959 if (OF_hasprop(node, "bias-pull-up")) in rk3568_parse_bias()
961 if (OF_hasprop(node, "bias-pull-down")) in rk3568_parse_bias()
963 return (-1); in rk3568_parse_bias()
1005 {"rockchip,rk3288-pinctrl", (uintptr_t)&rk3288_conf},
1006 {"rockchip,rk3328-pinctrl", (uintptr_t)&rk3328_conf},
1007 {"rockchip,rk3399-pinctrl", (uintptr_t)&rk3399_conf},
1008 {"rockchip,rk3568-pinctrl", (uintptr_t)&rk3568_conf},
1019 if (OF_getencprop(node, "drive-strength", &value, in rk_pinctrl_parse_drive()
1021 return (-1); in rk_pinctrl_parse_drive()
1024 for (i = 0; i < sc->conf->npin_drive; i++) { in rk_pinctrl_parse_drive()
1025 if (sc->conf->pin_drive[i].bank != bank && in rk_pinctrl_parse_drive()
1026 sc->conf->pin_drive[i].subbank != subbank) in rk_pinctrl_parse_drive()
1028 if (sc->conf->pin_drive[i].ma == value) { in rk_pinctrl_parse_drive()
1029 *drive = sc->conf->pin_drive[i].value; in rk_pinctrl_parse_drive()
1034 return (-1); in rk_pinctrl_parse_drive()
1038 rk_pinctrl_get_fixup(struct rk_pinctrl_softc *sc, uint32_t bank, uint32_t pin, in rk_pinctrl_get_fixup() argument
1043 for (i = 0; i < sc->conf->npin_fixup; i++) in rk_pinctrl_get_fixup()
1044 if (sc->conf->pin_fixup[i].bank == bank && in rk_pinctrl_get_fixup()
1045 sc->conf->pin_fixup[i].pin == pin) { in rk_pinctrl_get_fixup()
1046 *reg = sc->conf->pin_fixup[i].reg; in rk_pinctrl_get_fixup()
1047 *mask = sc->conf->pin_fixup[i].mask; in rk_pinctrl_get_fixup()
1048 *bit = sc->conf->pin_fixup[i].bit; in rk_pinctrl_get_fixup()
1056 uint32_t pin) in rk_pinctrl_handle_io() argument
1067 /* Get (subset of) GPIO pin properties. */ in rk_pinctrl_handle_io()
1068 if (OF_hasprop(node, "output-disable")) { in rk_pinctrl_handle_io()
1074 if (OF_hasprop(node, "output-enable")) { in rk_pinctrl_handle_io()
1080 if (OF_hasprop(node, "output-low")) { in rk_pinctrl_handle_io()
1088 if (OF_hasprop(node, "output-high")) { in rk_pinctrl_handle_io()
1101 for(i = 0; i < sc->conf->ngpio_bank; i++) { in rk_pinctrl_handle_io()
1102 if (bank == sc->conf->gpio_bank[i].bank) { in rk_pinctrl_handle_io()
1103 gpio = sc->conf->gpio_bank + i; in rk_pinctrl_handle_io()
1108 device_printf(sc->dev, "Cannot find GPIO bank %d\n", bank); in rk_pinctrl_handle_io()
1111 if (gpio->gpio_dev == NULL) { in rk_pinctrl_handle_io()
1112 device_printf(sc->dev, in rk_pinctrl_handle_io()
1119 rv = GPIO_PIN_SET(gpio->gpio_dev, pin, pin_value); in rk_pinctrl_handle_io()
1121 device_printf(sc->dev, "Cannot set GPIO value: %d\n", in rk_pinctrl_handle_io()
1128 rv = GPIO_PIN_SETFLAGS(gpio->gpio_dev, pin, direction_value); in rk_pinctrl_handle_io()
1130 device_printf(sc->dev, in rk_pinctrl_handle_io()
1144 uint32_t bank, subbank, pin, function; in rk_pinctrl_configure_pin() local
1149 pin = pindata[1]; in rk_pinctrl_configure_pin()
1152 subbank = pin / 8; in rk_pinctrl_configure_pin()
1154 for (i = 0; i < sc->conf->iomux_nbanks; i++) in rk_pinctrl_configure_pin()
1155 if (sc->conf->iomux_conf[i].bank == bank && in rk_pinctrl_configure_pin()
1156 sc->conf->iomux_conf[i].subbank == subbank) in rk_pinctrl_configure_pin()
1159 if (i == sc->conf->iomux_nbanks) { in rk_pinctrl_configure_pin()
1160 device_printf(sc->dev, "Unknown pin %d in bank %d\n", pin, in rk_pinctrl_configure_pin()
1166 syscon = sc->conf->get_syscon(sc, bank); in rk_pinctrl_configure_pin()
1169 rv = rk_pinctrl_handle_io(sc, pin_conf, bank, pin); in rk_pinctrl_configure_pin()
1171 /* Then pin pull-up/down */ in rk_pinctrl_configure_pin()
1172 bias = sc->conf->parse_bias(pin_conf, bank); in rk_pinctrl_configure_pin()
1174 reg = sc->conf->get_pd_offset(sc, bank); in rk_pinctrl_configure_pin()
1175 reg += bank * 0x10 + ((pin / 8) * 0x4); in rk_pinctrl_configure_pin()
1176 bit = (pin % 8) * 2; in rk_pinctrl_configure_pin()
1182 if (ofw_bus_node_is_compatible(ofw_bus_get_node(sc->dev), in rk_pinctrl_configure_pin()
1183 "rockchip,rk3568-pinctrl")) { in rk_pinctrl_configure_pin()
1185 if (OF_getencprop(pin_conf, "drive-strength", &value, in rk_pinctrl_configure_pin()
1188 reg = 0x01c0 + (bank * 0x40) + (pin / 2 * 4); in rk_pinctrl_configure_pin()
1190 reg = 0x0070 + (pin / 2 * 4); in rk_pinctrl_configure_pin()
1192 drive = ((1 << (value + 1)) - 1) << (pin % 2); in rk_pinctrl_configure_pin()
1194 mask = 0x3f << (pin % 2); in rk_pinctrl_configure_pin()
1202 bit = (pin % 8) * 2; in rk_pinctrl_configure_pin()
1209 /* Finally set the pin function */ in rk_pinctrl_configure_pin()
1210 reg = sc->conf->iomux_conf[i].offset; in rk_pinctrl_configure_pin()
1211 switch (sc->conf->iomux_conf[i].nbits) { in rk_pinctrl_configure_pin()
1213 if ((pin % 8) >= 4) in rk_pinctrl_configure_pin()
1215 bit = (pin % 4) * 4; in rk_pinctrl_configure_pin()
1219 if ((pin % 8) >= 5) in rk_pinctrl_configure_pin()
1221 bit = (pin % 8 % 5) * 3; in rk_pinctrl_configure_pin()
1225 bit = (pin % 8) * 2; in rk_pinctrl_configure_pin()
1229 device_printf(sc->dev, in rk_pinctrl_configure_pin()
1230 "Unknown pin stride width %d in bank %d\n", in rk_pinctrl_configure_pin()
1231 sc->conf->iomux_conf[i].nbits, bank); in rk_pinctrl_configure_pin()
1234 rk_pinctrl_get_fixup(sc, bank, pin, ®, &mask, &bit); in rk_pinctrl_configure_pin()
1237 * NOTE: not all syscon registers uses hi-word write mask, thus in rk_pinctrl_configure_pin()
1240 * without hi-word write mask. in rk_pinctrl_configure_pin()
1244 /* RK3568 specific pin mux for various functionalities */ in rk_pinctrl_configure_pin()
1245 if (ofw_bus_node_is_compatible(ofw_bus_get_node(sc->dev), in rk_pinctrl_configure_pin()
1246 "rockchip,rk3568-pinctrl")) { in rk_pinctrl_configure_pin()
1247 if (bank == 3 && pin == 9 && function == 3) in rk_pinctrl_configure_pin()
1248 SYSCON_WRITE_4(sc->grf, in rk_pinctrl_configure_pin()
1250 if (bank == 4 && pin == 7 && function == 3) in rk_pinctrl_configure_pin()
1251 SYSCON_WRITE_4(sc->grf, in rk_pinctrl_configure_pin()
1280 int bank, uint32_t pin, bool *is_gpio) in rk_pinctrl_is_gpio_locked() argument
1288 subbank = pin / 8; in rk_pinctrl_is_gpio_locked()
1291 for (i = 0; i < sc->conf->iomux_nbanks; i++) in rk_pinctrl_is_gpio_locked()
1292 if (sc->conf->iomux_conf[i].bank == bank && in rk_pinctrl_is_gpio_locked()
1293 sc->conf->iomux_conf[i].subbank == subbank) in rk_pinctrl_is_gpio_locked()
1296 if (i == sc->conf->iomux_nbanks) { in rk_pinctrl_is_gpio_locked()
1297 device_printf(sc->dev, "Unknown pin %d in bank %d\n", pin, in rk_pinctrl_is_gpio_locked()
1302 syscon = sc->conf->get_syscon(sc, bank); in rk_pinctrl_is_gpio_locked()
1304 /* Parse pin function */ in rk_pinctrl_is_gpio_locked()
1305 reg = sc->conf->iomux_conf[i].offset; in rk_pinctrl_is_gpio_locked()
1306 switch (sc->conf->iomux_conf[i].nbits) { in rk_pinctrl_is_gpio_locked()
1308 if ((pin % 8) >= 4) in rk_pinctrl_is_gpio_locked()
1310 bit = (pin % 4) * 4; in rk_pinctrl_is_gpio_locked()
1314 if ((pin % 8) >= 5) in rk_pinctrl_is_gpio_locked()
1316 bit = (pin % 8 % 5) * 3; in rk_pinctrl_is_gpio_locked()
1320 bit = (pin % 8) * 2; in rk_pinctrl_is_gpio_locked()
1324 device_printf(sc->dev, in rk_pinctrl_is_gpio_locked()
1325 "Unknown pin stride width %d in bank %d\n", in rk_pinctrl_is_gpio_locked()
1326 sc->conf->iomux_conf[i].nbits, bank); in rk_pinctrl_is_gpio_locked()
1329 rk_pinctrl_get_fixup(sc, bank, pin, ®, &mask, &bit); in rk_pinctrl_is_gpio_locked()
1334 /* Test if the pin is in gpio mode */ in rk_pinctrl_is_gpio_locked()
1346 for (i = 0; i < sc->conf->ngpio_bank; i++) { in rk_pinctrl_get_bank()
1347 if (sc->conf->gpio_bank[i].gpio_dev == gpio) in rk_pinctrl_get_bank()
1350 if (i == sc->conf->ngpio_bank) in rk_pinctrl_get_bank()
1358 rk_pinctrl_is_gpio(device_t pinctrl, device_t gpio, uint32_t pin, bool *is_gpio) in rk_pinctrl_is_gpio() argument
1371 syscon = sc->conf->get_syscon(sc, bank); in rk_pinctrl_is_gpio()
1372 rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, is_gpio); in rk_pinctrl_is_gpio()
1381 rk_pinctrl_get_flags(device_t pinctrl, device_t gpio, uint32_t pin, in rk_pinctrl_get_flags() argument
1398 syscon = sc->conf->get_syscon(sc, bank); in rk_pinctrl_get_flags()
1399 rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, &is_gpio); in rk_pinctrl_get_flags()
1407 reg = sc->conf->get_pd_offset(sc, bank); in rk_pinctrl_get_flags()
1408 reg += bank * 0x10 + ((pin / 8) * 0x4); in rk_pinctrl_get_flags()
1409 bit = (pin % 8) * 2; in rk_pinctrl_get_flags()
1412 bias = sc->conf->resolv_bias_value(bank, reg); in rk_pinctrl_get_flags()
1421 rk_pinctrl_set_flags(device_t pinctrl, device_t gpio, uint32_t pin, in rk_pinctrl_set_flags() argument
1438 syscon = sc->conf->get_syscon(sc, bank); in rk_pinctrl_set_flags()
1439 rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, &is_gpio); in rk_pinctrl_set_flags()
1447 reg = sc->conf->get_pd_offset(sc, bank); in rk_pinctrl_set_flags()
1448 reg += bank * 0x10 + ((pin / 8) * 0x4); in rk_pinctrl_set_flags()
1449 bit = (pin % 8) * 2; in rk_pinctrl_set_flags()
1451 bias = sc->conf->get_bias_value(bank, flags); in rk_pinctrl_set_flags()
1466 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in rk_pinctrl_probe()
1482 sc->dev = dev; in rk_pinctrl_attach()
1488 "rockchip,grf", &sc->grf) != 0) { in rk_pinctrl_attach()
1494 if (ofw_bus_node_is_compatible(node, "rockchip,rk3568-pinctrl") || in rk_pinctrl_attach()
1495 ofw_bus_node_is_compatible(node, "rockchip,rk3399-pinctrl") || in rk_pinctrl_attach()
1496 ofw_bus_node_is_compatible(node, "rockchip,rk3288-pinctrl")) { in rk_pinctrl_attach()
1499 "rockchip,pmu", &sc->pmu) != 0) { in rk_pinctrl_attach()
1505 mtx_init(&sc->mtx, "rk pinctrl", "pinctrl", MTX_SPIN); in rk_pinctrl_attach()
1507 sc->conf = (struct rk_pinctrl_conf *)ofw_bus_search_compatible(dev, in rk_pinctrl_attach()
1508 compat_data)->ocd_data; in rk_pinctrl_attach()
1519 if (!ofw_bus_node_is_compatible(node, "rockchip,gpio-bank")) in rk_pinctrl_attach()
1521 cdev = simplebus_add_device(dev, node, 0, NULL, -1, NULL); in rk_pinctrl_attach()
1529 device_printf(sc->dev, in rk_pinctrl_attach()
1534 sc->conf->gpio_bank[gpio_unit].gpio_dev = cdev; in rk_pinctrl_attach()