1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
47 #include <dev/phy/phy.h>
49 #include <contrib/device-tree/include/dt-bindings/phy/phy.h>
69 	{"rockchip,rk3568-pcie3-phy",	1},
93 		SYSCON_WRITE_4(sc->phy_grf, control, GRF_PCIE30PHY_WR_EN);  in rk3568_pciephy_bifurcate()
96 		SYSCON_WRITE_4(sc->phy_grf, control,  in rk3568_pciephy_bifurcate()
100 		SYSCON_WRITE_4(sc->phy_grf, control,  in rk3568_pciephy_bifurcate()
112 /* PHY class and methods */
121 		/* Pull PHY out of reset */  in rk3568_pciephy_enable()
122 		hwreset_deassert(sc->phy_reset);  in rk3568_pciephy_enable()
125 		for (count = 100; count; count--) {  in rk3568_pciephy_enable()
126 			if (SYSCON_READ_4(sc->phy_grf, GRF_PCIE30PHY_STATUS0) &  in rk3568_pciephy_enable()
155 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)  in rk3568_pciephy_probe()
157 	device_set_desc(dev, "RockChip PCIe PHY");  in rk3568_pciephy_probe()
170 	sc->dev = dev;  in rk3568_pciephy_attach()
171 	sc->node = ofw_bus_get_node(dev);  in rk3568_pciephy_attach()
174 	if (!(sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,  in rk3568_pciephy_attach()
181 	if (OF_hasprop(sc->node, "rockchip,phy-grf") &&  in rk3568_pciephy_attach()
182 	    syscon_get_by_ofw_property(dev, sc->node, "rockchip,phy-grf",  in rk3568_pciephy_attach()
183 	    &sc->phy_grf))  in rk3568_pciephy_attach()
187 	if (clk_get_by_ofw_name(dev, 0, "refclk_m", &sc->refclk_m)) {  in rk3568_pciephy_attach()
191 	if (clk_enable(sc->refclk_m))  in rk3568_pciephy_attach()
193 	if (clk_get_by_ofw_name(dev, 0, "refclk_n", &sc->refclk_n)) {  in rk3568_pciephy_attach()
197 	if (clk_enable(sc->refclk_n))  in rk3568_pciephy_attach()
199 	if (clk_get_by_ofw_name(dev, 0, "pclk", &sc->pclk)) {  in rk3568_pciephy_attach()
203 	if (clk_enable(sc->pclk))  in rk3568_pciephy_attach()
207 	if (hwreset_get_by_ofw_idx(dev, sc->node, 0, &sc->phy_reset)) {  in rk3568_pciephy_attach()
210 		hwreset_assert(sc->phy_reset);  in rk3568_pciephy_attach()
214 	/* Set bifurcation according to "data-lanes" entry */  in rk3568_pciephy_attach()
215 	if (OF_hasprop(sc->node, "data-lanes")) {  in rk3568_pciephy_attach()
216 		OF_getencprop(sc->node, "data-lanes", data_lanes,  in rk3568_pciephy_attach()
222 	/* Deassert PCIe PMA output clamp mode */  in rk3568_pciephy_attach()
223 	SYSCON_WRITE_4(sc->phy_grf, GRF_PCIE30PHY_CON9, GRF_PCIE30PHY_DA_OCM);  in rk3568_pciephy_attach()
225 	/* Configure PHY HW accordingly */  in rk3568_pciephy_attach()
230 		SYSCON_WRITE_4(sc->phy_grf, GRF_PCIE30PHY_CON1,  in rk3568_pciephy_attach()
233 		SYSCON_WRITE_4(sc->phy_grf, GRF_PCIE30PHY_CON1,  in rk3568_pciephy_attach()
238 	phy_init.ofw_node = sc->node;  in rk3568_pciephy_attach()
241 		device_printf(dev, "failed to create pciephy PHY\n");  in rk3568_pciephy_attach()
245 		device_printf(dev, "failed to register pciephy PHY\n");  in rk3568_pciephy_attach()
248 	sc->phynode = phynode;  in rk3568_pciephy_attach()