Lines Matching +full:0 +full:x29000
44 #define GCC_QDSS_BCR 0x29000
45 #define GCC_QDSS_BCR_BLK_ARES (1 << 0) /* Async software reset. */
46 #define GCC_QDSS_CFG_AHB_CBCR 0x29008
47 #define AHB_CBCR_CLK_ENABLE (1 << 0) /* AHB clk branch ctrl */
48 #define GCC_QDSS_ETR_USB_CBCR 0x29028
49 #define ETR_USB_CBCR_CLK_ENABLE (1 << 0) /* ETR USB clk branch ctrl */
50 #define GCC_QDSS_DAP_CBCR 0x29084
51 #define DAP_CBCR_CLK_ENABLE (1 << 0) /* DAP clk branch ctrl */
55 { NULL, 0 }
63 { SYS_RES_MEMORY, 0, RF_ACTIVE },
64 { -1, 0 }
88 bus_write_4(sc->res, GCC_QDSS_BCR, 0); in qcom_qdss_enable()
97 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in qcom_gcc_probe()
112 if (bus_alloc_resources(dev, qcom_gcc_spec, &sc->res) != 0) { in qcom_gcc_attach()
124 return (0); in qcom_gcc_attach()
141 EARLY_DRIVER_MODULE(qcom_gcc, simplebus, qcom_gcc_driver, 0, 0,