Lines Matching full:pad
436 #define PAD(n, t, cn, rn, e, d) { \ macro
445 PAD("usb2", PADCTL_PAD_USB2, "trk", NULL, usb2_enable, usb2_disable),
446 PAD("hsic", PADCTL_PAD_HSIC, "trk", NULL, hsic_enable, hsic_disable),
447 PAD("pcie", PADCTL_PAD_PCIE, "pll", "phy", pcie_enable, pcie_disable),
448 PAD("sata", PADCTL_PAD_SATA, "pll", "phy", sata_enable, sata_disable),
467 struct padctl_pad *pad; member
543 uphy_pex_enable(struct padctl_softc *sc, struct padctl_pad *pad) in uphy_pex_enable() argument
555 rv = clk_enable(pad->clk); in uphy_pex_enable()
557 device_printf(sc->dev, "Cannot enable clock for pad '%s': %d\n", in uphy_pex_enable()
558 pad->name, rv); in uphy_pex_enable()
562 rv = hwreset_deassert(pad->reset); in uphy_pex_enable()
564 device_printf(sc->dev, "Cannot unreset pad '%s': %d\n", in uphy_pex_enable()
565 pad->name, rv); in uphy_pex_enable()
566 clk_disable(pad->clk); in uphy_pex_enable()
637 "for pad '%s' (0x%08X).\n", pad->name, reg); in uphy_pex_enable()
653 "for pad '%s'.\n", pad->name); in uphy_pex_enable()
670 "for pad '%s'.\n", pad->name); in uphy_pex_enable()
689 "for pad '%s'.\n", pad->name); in uphy_pex_enable()
707 "for pad '%s'.\n", pad->name); in uphy_pex_enable()
740 hwreset_deassert(pad->reset); in uphy_pex_enable()
741 clk_disable(pad->clk); in uphy_pex_enable()
746 uphy_pex_disable(struct padctl_softc *sc, struct padctl_pad *pad) in uphy_pex_disable() argument
752 rv = hwreset_assert(pad->reset); in uphy_pex_disable()
754 device_printf(sc->dev, "Cannot reset pad '%s': %d\n", in uphy_pex_disable()
755 pad->name, rv); in uphy_pex_disable()
757 rv = clk_disable(pad->clk); in uphy_pex_disable()
760 "Cannot dicable clock for pad '%s': %d\n", in uphy_pex_disable()
761 pad->name, rv); in uphy_pex_disable()
767 uphy_sata_enable(struct padctl_softc *sc, struct padctl_pad *pad, bool usb) in uphy_sata_enable() argument
779 rv = clk_enable(pad->clk); in uphy_sata_enable()
781 device_printf(sc->dev, "Cannot enable clock for pad '%s': %d\n", in uphy_sata_enable()
782 pad->name, rv); in uphy_sata_enable()
786 rv = hwreset_deassert(pad->reset); in uphy_sata_enable()
788 device_printf(sc->dev, "Cannot unreset pad '%s': %d\n", in uphy_sata_enable()
789 pad->name, rv); in uphy_sata_enable()
790 clk_disable(pad->clk); in uphy_sata_enable()
872 "for pad '%s'.\n", pad->name); in uphy_sata_enable()
888 "for pad '%s'.\n", pad->name); in uphy_sata_enable()
905 "for pad '%s'.\n", pad->name); in uphy_sata_enable()
923 "for pad '%s'.\n", pad->name); in uphy_sata_enable()
939 "for pad '%s'.\n", pad->name); in uphy_sata_enable()
972 hwreset_deassert(pad->reset); in uphy_sata_enable()
973 clk_disable(pad->clk); in uphy_sata_enable()
978 uphy_sata_disable(struct padctl_softc *sc, struct padctl_pad *pad) in uphy_sata_disable() argument
984 rv = hwreset_assert(pad->reset); in uphy_sata_disable()
986 device_printf(sc->dev, "Cannot reset pad '%s': %d\n", in uphy_sata_disable()
987 pad->name, rv); in uphy_sata_disable()
989 rv = clk_disable(pad->clk); in uphy_sata_disable()
992 "Cannot dicable clock for pad '%s': %d\n", in uphy_sata_disable()
993 pad->name, rv); in uphy_sata_disable()
1003 struct padctl_pad *pad; in usb3_port_init() local
1006 pad = port->lane->pad; in usb3_port_init()
1044 if (pad->type == PADCTL_PAD_SATA) in usb3_port_init()
1045 rv = uphy_sata_enable(sc, pad, true); in usb3_port_init()
1047 rv = uphy_pex_enable(sc, pad); in usb3_port_init()
1075 rv = uphy_pex_enable(sc, lane->pad); in pcie_enable()
1095 uphy_pex_disable(sc, lane->pad); in pcie_disable()
1107 rv = uphy_sata_enable(sc, lane->pad, false); in sata_enable()
1127 uphy_sata_disable(sc, lane->pad); in sata_disable()
1136 struct padctl_pad *pad; in hsic_enable() local
1145 pad = lane->pad; in hsic_enable()
1190 rv = clk_enable(pad->clk); in hsic_enable()
1192 device_printf(sc->dev, "Cannot enable clock for pad '%s': %d\n", in hsic_enable()
1193 pad->name, rv); in hsic_enable()
1213 clk_disable(pad->clk); in hsic_enable()
1258 struct padctl_pad *pad; in usb2_enable() local
1267 pad = lane->pad; in usb2_enable()
1314 rv = clk_enable(pad->clk); in usb2_enable()
1316 device_printf(sc->dev, "Cannot enable clock for pad '%s': %d\n", in usb2_enable()
1317 pad->name, rv); in usb2_enable()
1339 struct padctl_pad *pad; in usb2_disable() local
1348 pad = lane->pad; in usb2_disable()
1363 rv = clk_disable(pad->clk); in usb2_disable()
1365 device_printf(sc->dev, "Cannot disable clock for pad '%s': %d\n", in usb2_disable()
1366 pad->name, rv); in usb2_disable()
1427 struct padctl_pad *pad; in xusbpadctl_phy_enable() local
1446 pad = lane->pad; in xusbpadctl_phy_enable()
1457 rv = pad->enable(sc, lane); in xusbpadctl_phy_enable()
1459 rv = pad->disable(sc, lane); in xusbpadctl_phy_enable()
1525 if (type == lanes_tbl[i].pad->type && idx == lanes_tbl[i].idx) in search_pad_lane()
1594 process_lane(struct padctl_softc *sc, phandle_t node, struct padctl_pad *pad) in process_lane() argument
1642 lane->pad = pad; in process_lane()
1644 pad->lanes[pad->nlanes++] = lane; in process_lane()
1675 struct padctl_pad *pad; in process_pad() local
1682 device_printf(sc->dev, "Cannot read pad name.\n"); in process_pad()
1686 pad = search_pad(sc, name); in process_pad()
1687 if (pad == NULL) { in process_pad()
1688 device_printf(sc->dev, "Unknown pad: %s\n", name); in process_pad()
1693 if (pad->clock_name != NULL) { in process_pad()
1694 rv = clk_get_by_ofw_name(sc->dev, node, pad->clock_name, in process_pad()
1695 &pad->clk); in process_pad()
1698 pad->clock_name); in process_pad()
1703 if (pad->reset_name != NULL) { in process_pad()
1704 rv = hwreset_get_by_ofw_name(sc->dev, node, pad->reset_name, in process_pad()
1705 &pad->reset); in process_pad()
1708 pad->reset_name); in process_pad()
1725 rv = process_lane(sc, node, pad); in process_pad()
1732 pad->enabled = true; in process_pad()