378 	struct padctl_lane	*lane;  member
416 				    struct padctl_lane *lane);
418 				    struct padctl_lane *lane);
427 static int usb2_enable(struct padctl_softc *sc, struct padctl_lane *lane);
428 static int usb2_disable(struct padctl_softc *sc, struct padctl_lane *lane);
429 static int hsic_enable(struct padctl_softc *sc, struct padctl_lane *lane);
430 static int hsic_disable(struct padctl_softc *sc, struct padctl_lane *lane);
431 static int pcie_enable(struct padctl_softc *sc, struct padctl_lane *lane);
432 static int pcie_disable(struct padctl_softc *sc, struct padctl_lane *lane);
433 static int sata_enable(struct padctl_softc *sc, struct padctl_lane *lane);
434 static int sata_disable(struct padctl_softc *sc, struct padctl_lane *lane);
473 #define	LANE(n, p, r, s, m, mx) {					\  macro
483 	LANE("usb2", 0, XUSB_PADCTL_USB2_PAD_MUX,  0, 0x3, usb_mux),
484 	LANE("usb2", 1, XUSB_PADCTL_USB2_PAD_MUX,  2, 0x3, usb_mux),
485 	LANE("usb2", 2, XUSB_PADCTL_USB2_PAD_MUX,  4, 0x3, usb_mux),
486 	LANE("usb2", 3, XUSB_PADCTL_USB2_PAD_MUX,  6, 0x3, usb_mux),
487 	LANE("hsic", 0, XUSB_PADCTL_USB2_PAD_MUX, 14, 0x1, hsic_mux),
488 	LANE("hsic", 1, XUSB_PADCTL_USB2_PAD_MUX, 15, 0x1, hsic_mux),
489 	LANE("pcie", 0, XUSB_PADCTL_USB3_PAD_MUX, 12, 0x3, pci_mux),
490 	LANE("pcie", 1, XUSB_PADCTL_USB3_PAD_MUX, 14, 0x3, pci_mux),
491 	LANE("pcie", 2, XUSB_PADCTL_USB3_PAD_MUX, 16, 0x3, pci_mux),
492 	LANE("pcie", 3, XUSB_PADCTL_USB3_PAD_MUX, 18, 0x3, pci_mux),
493 	LANE("pcie", 4, XUSB_PADCTL_USB3_PAD_MUX, 20, 0x3, pci_mux),
494 	LANE("pcie", 5, XUSB_PADCTL_USB3_PAD_MUX, 22, 0x3, pci_mux),
495 	LANE("pcie", 6, XUSB_PADCTL_USB3_PAD_MUX, 24, 0x3, pci_mux),
496 	LANE("sata", 0, XUSB_PADCTL_USB3_PAD_MUX, 30, 0x3, pci_mux),
512 	LANE_MAP(0, PADCTL_PAD_PCIE, 6), 	/* port USB3-0 -> lane PCIE-0 */
513 	LANE_MAP(1, PADCTL_PAD_PCIE, 5), 	/* port USB3-1 -> lane PCIE-1 */
514 	LANE_MAP(2, PADCTL_PAD_PCIE, 0), 	/* port USB3-2 -> lane PCIE-0 */
515 	LANE_MAP(2, PADCTL_PAD_PCIE, 2), 	/* port USB3-2 -> lane PCIE-2 */
516 	LANE_MAP(3, PADCTL_PAD_PCIE, 4), 	/* port USB3-3 -> lane PCIE-4 */
530     struct padctl_lane *lane);
554 	/* 1. Deassert PLL/Lane resets. */  in uphy_pex_enable()
773 	/* 1. Deassert PLL/Lane resets. */  in uphy_sata_enable()
1006 	pad = port->lane->pad;  in usb3_port_init()
1070 pcie_enable(struct padctl_softc *sc, struct padctl_lane *lane)  in pcie_enable()  argument
1075 	rv = uphy_pex_enable(sc, lane->pad);  in pcie_enable()
1080 	reg |= USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->idx);  in pcie_enable()
1087 pcie_disable(struct padctl_softc *sc, struct padctl_lane *lane)  in pcie_disable()  argument
1092 	reg &= ~USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->idx);  in pcie_disable()
1095 	uphy_pex_disable(sc, lane->pad);  in pcie_disable()
1102 sata_enable(struct padctl_softc *sc, struct padctl_lane *lane)  in sata_enable()  argument
1107 	rv = uphy_sata_enable(sc, lane->pad, false);  in sata_enable()
1112 	reg |= USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->idx);  in sata_enable()
1119 sata_disable(struct padctl_softc *sc, struct padctl_lane *lane)  in sata_disable()  argument
1124 	reg &= ~USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->idx);  in sata_disable()
1127 	uphy_sata_disable(sc, lane->pad);  in sata_disable()
1133 hsic_enable(struct padctl_softc *sc, struct padctl_lane *lane)  in hsic_enable()  argument
1140 	port = search_lane_port(sc, lane);  in hsic_enable()
1142 		device_printf(sc->dev, "Cannot find port for lane: %s\n",  in hsic_enable()
1143 		    lane->name);  in hsic_enable()
1145 	pad = lane->pad;  in hsic_enable()
1158 	reg = RD4(sc, XUSB_PADCTL_HSIC_PAD_CTL1(lane->idx));  in hsic_enable()
1161 	WR4(sc, XUSB_PADCTL_HSIC_PAD_CTL1(lane->idx), reg);  in hsic_enable()
1163 	reg = RD4(sc, XUSB_PADCTL_HSIC_PAD_CTL2(lane->idx));  in hsic_enable()
1170 	WR4(sc, XUSB_PADCTL_HSIC_PAD_CTL2(lane->idx), reg);  in hsic_enable()
1172 	reg = RD4(sc, XUSB_PADCTL_HSIC_PAD_CTL0(lane->idx));  in hsic_enable()
1188 	WR4(sc, XUSB_PADCTL_HSIC_PAD_CTL0(lane->idx), reg);  in hsic_enable()
1218 hsic_disable(struct padctl_softc *sc, struct padctl_lane *lane)  in hsic_disable()  argument
1224 	port = search_lane_port(sc, lane);  in hsic_disable()
1226 		device_printf(sc->dev, "Cannot find port for lane: %s\n",  in hsic_disable()
1227 		    lane->name);  in hsic_disable()
1230 	reg = RD4(sc, XUSB_PADCTL_HSIC_PAD_CTL0(lane->idx));  in hsic_disable()
1240 	WR4(sc, XUSB_PADCTL_HSIC_PAD_CTL1(lane->idx), reg);  in hsic_disable()
1255 usb2_enable(struct padctl_softc *sc, struct padctl_lane *lane)  in usb2_enable()  argument
1262 	port = search_lane_port(sc, lane);  in usb2_enable()
1264 		device_printf(sc->dev, "Cannot find port for lane: %s\n",  in usb2_enable()
1265 		    lane->name);  in usb2_enable()
1267 	pad = lane->pad;  in usb2_enable()
1276 	reg &= ~USB2_PORT_CAP_PORT_CAP(lane->idx, ~0);  in usb2_enable()
1277 	reg |= USB2_PORT_CAP_PORT_CAP(lane->idx, USB2_PORT_CAP_PORT_CAP_HOST);  in usb2_enable()
1280 	reg = RD4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL0(lane->idx));  in usb2_enable()
1287 	reg |= USB2_OTG_PAD_CTL0_HS_CURR_LEVEL(sc->hs_curr_level[lane->idx] +  in usb2_enable()
1289 	WR4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL0(lane->idx), reg);  in usb2_enable()
1291 	reg = RD4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL1(lane->idx));  in usb2_enable()
1299 	WR4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL1(lane->idx), reg);  in usb2_enable()
1301 	reg = RD4(sc, XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1(lane->idx));  in usb2_enable()
1304 	WR4(sc, XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1(lane->idx), reg);  in usb2_enable()
1336 usb2_disable(struct padctl_softc *sc, struct padctl_lane *lane)  in usb2_disable()  argument
1343 	port = search_lane_port(sc, lane);  in usb2_disable()
1345 		device_printf(sc->dev, "Cannot find port for lane: %s\n",  in usb2_disable()
1346 		    lane->name);  in usb2_disable()
1348 	pad = lane->pad;  in usb2_disable()
1426 	struct padctl_lane *lane;  in xusbpadctl_phy_enable()  local
1439 	lane = lanes_tbl + id;  in xusbpadctl_phy_enable()
1440 	if (!lane->enabled) {  in xusbpadctl_phy_enable()
1441 		device_printf(dev, "Lane is not enabled/configured: %s\n",  in xusbpadctl_phy_enable()
1442 		    lane->name);  in xusbpadctl_phy_enable()
1446 	pad = lane->pad;  in xusbpadctl_phy_enable()
1457 		rv = pad->enable(sc, lane);  in xusbpadctl_phy_enable()
1459 		rv = pad->disable(sc, lane);  in xusbpadctl_phy_enable()
1492 search_lane_port(struct padctl_softc *sc, struct padctl_lane *lane)  in search_lane_port()  argument
1499 		if (ports_tbl[i].lane == lane)  in search_lane_port()
1535 	struct padctl_lane *lane, *tmp;  in search_usb3_pad_lane()  local
1537 	lane = NULL;  in search_usb3_pad_lane()
1547 		if (lane != NULL) {  in search_usb3_pad_lane()
1549 			 " lanes: %s and %s\n", lane->name, tmp->name);  in search_usb3_pad_lane()
1552 		lane = tmp;  in search_usb3_pad_lane()
1554 	return (lane);  in search_usb3_pad_lane()
1570 search_mux(struct padctl_softc *sc, struct padctl_lane *lane, char *fnc_name)  in search_mux()  argument
1574 	for (i = 0; i < lane->nmux; i++) {  in search_mux()
1575 		if (strcmp(fnc_name, lane->mux[i]) == 0)  in search_mux()
1582 config_lane(struct padctl_softc *sc, struct padctl_lane *lane)  in config_lane()  argument
1586 	reg = RD4(sc, lane->reg);  in config_lane()
1587 	reg &= ~(lane->mask << lane->shift);  in config_lane()
1588 	reg |=  (lane->mux_idx & lane->mask) << lane->shift;  in config_lane()
1589 	WR4(sc, lane->reg, reg);  in config_lane()
1596 	struct padctl_lane *lane;  in process_lane()  local
1607 		device_printf(sc->dev, "Cannot read lane name.\n");  in process_lane()
1611 	lane = search_lane(sc, name);  in process_lane()
1612 	if (lane == NULL) {  in process_lane()
1613 		device_printf(sc->dev, "Unknown lane: %s\n", name);  in process_lane()
1621 		device_printf(sc->dev, "Cannot read lane function.\n");  in process_lane()
1626 	lane->mux_idx = search_mux(sc, lane, function);  in process_lane()
1627 	if (lane->mux_idx == ~0) {  in process_lane()
1628 		device_printf(sc->dev, "Unknown function %s for lane %s\n",  in process_lane()
1634 	rv = config_lane(sc, lane);  in process_lane()
1636 		device_printf(sc->dev, "Cannot configure lane: %s: %d\n",  in process_lane()
1641 	lane->xref = OF_xref_from_node(node);  in process_lane()
1642 	lane->pad = pad;  in process_lane()
1643 	lane->enabled = true;  in process_lane()
1644 	pad->lanes[pad->nlanes++] = lane;  in process_lane()
1648 	phy_init.id = lane - lanes_tbl;  in process_lane()
1768 	/* Find assigned lane */  in process_port()
1769 	if (port->lane == NULL) {  in process_port()
1773 			port->lane = search_pad_lane(sc, PADCTL_PAD_USB2,  in process_port()
1777 			port->lane = search_pad_lane(sc, PADCTL_PAD_HSIC,  in process_port()
1781 			port->lane = search_usb3_pad_lane(sc, port->idx);  in process_port()
1785 	if (port->lane == NULL) {  in process_port()
1786 		device_printf(sc->dev, "Cannot find lane for port: %s\n", name);  in process_port()