Lines Matching +full:clock +full:- +full:freq
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 uint64_t freq; /* Frequency point */ member
66 uint64_t freq; /* Frequecy */ member
72 {204000000UL, 1007452, -23865, 370},
73 {306000000UL, 1052709, -24875, 370},
74 {408000000UL, 1099069, -25895, 370},
75 {510000000UL, 1146534, -26905, 370},
76 {612000000UL, 1195102, -27915, 370},
77 {714000000UL, 1244773, -28925, 370},
78 {816000000UL, 1295549, -29935, 370},
79 {918000000UL, 1347428, -30955, 370},
80 {1020000000UL, 1400411, -31965, 370},
81 {1122000000UL, 1454497, -32975, 370},
82 {1224000000UL, 1509687, -33985, 370},
83 {1326000000UL, 1565981, -35005, 370},
84 {1428000000UL, 1623379, -36015, 370},
85 {1530000000UL, 1681880, -37025, 370},
86 {1632000000UL, 1741485, -38035, 370},
87 {1734000000UL, 1802194, -39055, 370},
88 {1836000000UL, 1864006, -40065, 370},
89 {1912500000UL, 1910780, -40815, 370},
174 * - compute base voltage from speedo value using speedo table
175 * - round up voltage to next regulator step
176 * - clamp it to regulator limits
179 freq_to_voltage(struct tegra210_cpufreq_softc *sc, uint64_t freq) in freq_to_voltage() argument
187 for (i = 0; i < sc->cpu_def->speedo_nitems; i++) { in freq_to_voltage()
188 if (sc->cpu_def->speedo_tbl[i].freq >= freq) { in freq_to_voltage()
189 ent = &sc->cpu_def->speedo_tbl[i]; in freq_to_voltage()
194 ent = &sc->cpu_def->speedo_tbl[sc->cpu_def->speedo_nitems - 1]; in freq_to_voltage()
195 scale = sc->cpu_def->speedo_scale; in freq_to_voltage()
199 uv = DIV_ROUND_CLOSEST(ent->c2 * sc->speedo_value, scale); in freq_to_voltage()
200 uv = DIV_ROUND_CLOSEST((uv + ent->c1) * sc->speedo_value, scale) + in freq_to_voltage()
201 ent->c0; in freq_to_voltage()
202 step_uvolt = sc->cpu_def->step_uvolt; in freq_to_voltage()
207 min_uvolt = ROUND_UP(sc->cpu_def->min_uvolt, step_uvolt); in freq_to_voltage()
208 max_uvolt = ROUND_DOWN(sc->cpu_def->max_uvolt, step_uvolt); in freq_to_voltage()
221 sc->nspeed_points = nitems(cpu_freq_tbl); in build_speed_points()
222 sc->speed_points = malloc(sizeof(struct cpu_speed_point) * in build_speed_points()
223 sc->nspeed_points, M_DEVBUF, M_NOWAIT); in build_speed_points()
224 for (i = 0; i < sc->nspeed_points; i++) { in build_speed_points()
225 sc->speed_points[i].freq = cpu_freq_tbl[i]; in build_speed_points()
226 sc->speed_points[i].uvolt = freq_to_voltage(sc, in build_speed_points()
232 get_speed_point(struct tegra210_cpufreq_softc *sc, uint64_t freq) in get_speed_point() argument
236 if (sc->speed_points[0].freq >= freq) in get_speed_point()
237 return (sc->speed_points + 0); in get_speed_point()
239 for (i = 0; i < sc->nspeed_points - 1; i++) { in get_speed_point()
240 if (sc->speed_points[i + 1].freq > freq) in get_speed_point()
241 return (sc->speed_points + i); in get_speed_point()
244 return (sc->speed_points + sc->nspeed_points - 1); in get_speed_point()
259 for (i = 0, j = sc->nspeed_points - 1; j >= 0; j--) { in tegra210_cpufreq_settings()
260 if (sc->cpu_max_freq < sc->speed_points[j].freq) in tegra210_cpufreq_settings()
262 sets[i].freq = sc->speed_points[j].freq / 1000000; in tegra210_cpufreq_settings()
263 sets[i].volts = sc->speed_points[j].uvolt / 1000; in tegra210_cpufreq_settings()
264 sets[i].lat = sc->latency; in tegra210_cpufreq_settings()
274 set_cpu_freq(struct tegra210_cpufreq_softc *sc, uint64_t freq) in set_cpu_freq() argument
279 point = get_speed_point(sc, freq); in set_cpu_freq()
282 rv = clk_set_freq(sc->clk_pll_x, point->freq, CLK_SET_ROUND_DOWN); in set_cpu_freq()
284 device_printf(sc->dev, "Can't set CPU clock frequency\n"); in set_cpu_freq()
288 sc->act_speed_point = point; in set_cpu_freq()
297 uint64_t freq; in tegra210_cpufreq_set() local
300 if (cf == NULL || cf->freq < 0) in tegra210_cpufreq_set()
305 freq = cf->freq; in tegra210_cpufreq_set()
306 if (freq < cpufreq_lowest_freq) in tegra210_cpufreq_set()
307 freq = cpufreq_lowest_freq; in tegra210_cpufreq_set()
308 freq *= 1000000; in tegra210_cpufreq_set()
309 if (freq >= sc->cpu_max_freq) in tegra210_cpufreq_set()
310 freq = sc->cpu_max_freq; in tegra210_cpufreq_set()
311 rv = set_cpu_freq(sc, freq); in tegra210_cpufreq_set()
326 cf->dev = NULL; in tegra210_cpufreq_get()
327 cf->freq = sc->act_speed_point->freq / 1000000; in tegra210_cpufreq_get()
328 cf->volts = sc->act_speed_point->uvolt / 1000; in tegra210_cpufreq_get()
330 cf->lat = sc->latency; in tegra210_cpufreq_get()
332 cf->dev = dev; in tegra210_cpufreq_get()
355 parent_dev = device_get_parent(sc->dev); in get_fdt_resources()
357 rv = clk_get_by_ofw_name(parent_dev, 0, "cpu_g", &sc->clk_cpu_g); in get_fdt_resources()
359 device_printf(sc->dev, "Cannot get 'cpu_g' clock: %d\n", rv); in get_fdt_resources()
363 rv = clk_get_by_ofw_name(parent_dev, 0, "pll_x", &sc->clk_pll_x); in get_fdt_resources()
365 device_printf(sc->dev, "Cannot get 'pll_x' clock\n"); in get_fdt_resources()
368 rv = clk_get_by_ofw_name(parent_dev, 0, "pll_p", &sc->clk_pll_p); in get_fdt_resources()
370 device_printf(parent_dev, "Cannot get 'pll_p' clock\n"); in get_fdt_resources()
373 rv = clk_get_by_ofw_name(parent_dev, 0, "dfll", &sc->clk_dfll); in get_fdt_resources()
378 device_printf(sc->dev, "Cannot get 'dfll' clock\n"); in get_fdt_resources()
396 if (device_find_child(parent, "tegra210_cpufreq", -1) != NULL) in tegra210_cpufreq_identify()
398 if (BUS_ADD_CHILD(parent, 0, "tegra210_cpufreq", -1) == NULL) in tegra210_cpufreq_identify()
415 uint64_t freq; in tegra210_cpufreq_attach() local
419 sc->dev = dev; in tegra210_cpufreq_attach()
420 sc->node = ofw_bus_get_node(device_get_parent(dev)); in tegra210_cpufreq_attach()
422 sc->process_id = tegra_sku_info.cpu_process_id; in tegra210_cpufreq_attach()
423 sc->speedo_id = tegra_sku_info.cpu_speedo_id; in tegra210_cpufreq_attach()
424 sc->speedo_value = tegra_sku_info.cpu_speedo_value; in tegra210_cpufreq_attach()
426 sc->cpu_def = &tegra210_cpu_volt_def; in tegra210_cpufreq_attach()
428 rv = get_fdt_resources(sc, sc->node); in tegra210_cpufreq_attach()
435 rv = clk_get_freq(sc->clk_cpu_g, &freq); in tegra210_cpufreq_attach()
437 device_printf(dev, "Can't get CPU clock frequency\n"); in tegra210_cpufreq_attach()
440 if (sc->speedo_id < nitems(cpu_max_freq)) in tegra210_cpufreq_attach()
441 sc->cpu_max_freq = cpu_max_freq[sc->speedo_id]; in tegra210_cpufreq_attach()
443 sc->cpu_max_freq = cpu_max_freq[0]; in tegra210_cpufreq_attach()
444 sc->act_speed_point = get_speed_point(sc, freq); in tegra210_cpufreq_attach()
449 device_printf(dev, "Can't set initial CPU clock frequency\n"); in tegra210_cpufreq_attach()
467 if (sc->clk_cpu_g != NULL) in tegra210_cpufreq_detach()
468 clk_release(sc->clk_cpu_g); in tegra210_cpufreq_detach()
469 if (sc->clk_pll_x != NULL) in tegra210_cpufreq_detach()
470 clk_release(sc->clk_pll_x); in tegra210_cpufreq_detach()
471 if (sc->clk_pll_p != NULL) in tegra210_cpufreq_detach()
472 clk_release(sc->clk_pll_p); in tegra210_cpufreq_detach()
473 if (sc->clk_dfll != NULL) in tegra210_cpufreq_detach()
474 clk_release(sc->clk_dfll); in tegra210_cpufreq_detach()