Lines Matching +full:lpm +full:- +full:gpios
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
47 #define GPIO_LOCK(_sc) sx_slock(&(_sc)->gpio_lock)
48 #define GPIO_UNLOCK(_sc) sx_unlock(&(_sc)->gpio_lock)
49 #define GPIO_ASSERT(_sc) sx_assert(&(_sc)->gpio_lock, SA_LOCKED)
71 {"bias-pull-up", CFG_BIAS_PULL_UP},
72 {"bias-pull-down", CFG_BIAS_PULL_DOWN},
73 {"drive-open-drain", CFG_OPEN_DRAIN},
74 {"drive-push-pull", CFG_PUSH_PULL},
75 {"maxim,active-fps-source", CFG_ACTIVE_FPS_SRC},
76 {"maxim,active-fps-power-up-slot", CFG_ACTIVE_PWRUP_SLOT},
77 {"maxim,active-fps-power-down-slot", CFG_ACTIVE_PWRDOWN_SLOT},
78 {"maxim,suspend-fps-source", CFG_SUSPEND_FPS_SRC},
79 {"maxim,suspend-fps-power-up-slot", CFG_SUSPEND_PWRUP_SLOT},
80 {"maxim,suspend-fps-power-down-slot", CFG_SUSPEND_PWRDOWN_SLOT},
90 "lpm-control-in",
91 "fps-out",
92 "32k-out1",
93 "sd0-dvs-in",
94 "sd1-dvs-in",
95 "reference-out",
107 /* --------------------------------------------------------------------------
118 cfg->alt_func = false; in max77620_pinmux_get_function()
123 cfg->alt_func = true; in max77620_pinmux_get_function()
127 return (-1); in max77620_pinmux_get_function()
135 struct max77620_fps_config *fps_config = &mpci->fps_config[pin]; in max77620_pinmux_set_fps()
148 param_val = fps_config->active_fps_src; in max77620_pinmux_set_fps()
150 param_val = fps_config->suspend_fps_src; in max77620_pinmux_set_fps()
157 param_val = fps_config->active_power_up_slots; in max77620_pinmux_set_fps()
159 param_val = fps_config->suspend_power_up_slots; in max77620_pinmux_set_fps()
166 param_val = fps_config->active_power_down_slots; in max77620_pinmux_set_fps()
168 param_val = fps_config->suspend_power_down_slots; in max77620_pinmux_set_fps()
172 dev_err(mpci->dev, "Invalid parameter %d for pin %d\n", in max77620_pinmux_set_fps()
174 return -EINVAL; in max77620_pinmux_set_fps()
180 ret = regmap_update_bits(mpci->rmap, addr, mask, param_val << shift); in max77620_pinmux_set_fps()
182 dev_err(mpci->dev, "Reg 0x%02x update failed %d\n", addr, ret); in max77620_pinmux_set_fps()
197 for (pin_num = 0; pin_num < sc->gpio_npins; pin_num++) { in max77620_pinmux_config_node()
198 if (strcmp(sc->gpio_pins[pin_num]->pin_name, pin_name) == 0) in max77620_pinmux_config_node()
201 if (pin_num >= sc->gpio_npins) { in max77620_pinmux_config_node()
202 device_printf(sc->dev, "Unknown pin: %s\n", pin_name); in max77620_pinmux_config_node()
205 pin = sc->gpio_pins[pin_num]; in max77620_pinmux_config_node()
211 rv = RD1(sc, pin->reg, ®); in max77620_pinmux_config_node()
213 device_printf(sc->dev, "Cannot read GIPO_CFG register\n"); in max77620_pinmux_config_node()
217 if (cfg->alt_func) { in max77620_pinmux_config_node()
218 pin->alt_func = true; in max77620_pinmux_config_node()
219 sc->gpio_reg_ame |= 1 << pin_num; in max77620_pinmux_config_node()
221 pin->alt_func = false; in max77620_pinmux_config_node()
222 sc->gpio_reg_ame &= ~(1 << pin_num); in max77620_pinmux_config_node()
226 switch (cfg->params[CFG_BIAS_PULL_UP]) { in max77620_pinmux_config_node()
228 sc->gpio_reg_pue |= 1 << pin_num; in max77620_pinmux_config_node()
231 sc->gpio_reg_pue &= ~(1 << pin_num); in max77620_pinmux_config_node()
237 switch (cfg->params[CFG_BIAS_PULL_DOWN]) { in max77620_pinmux_config_node()
239 sc->gpio_reg_pde |= 1 << pin_num; in max77620_pinmux_config_node()
242 sc->gpio_reg_pde &= ~(1 << pin_num); in max77620_pinmux_config_node()
248 /* Open drain/push-pull modes. */ in max77620_pinmux_config_node()
249 if (cfg->params[CFG_OPEN_DRAIN] == 1) { in max77620_pinmux_config_node()
254 if (cfg->params[CFG_PUSH_PULL] == 1) { in max77620_pinmux_config_node()
259 rv = WR1(sc, pin->reg, reg); in max77620_pinmux_config_node()
261 device_printf(sc->dev, "Cannot read GIPO_CFG register\n"); in max77620_pinmux_config_node()
283 if (rv == -1) { in max77620_pinmux_read_node()
284 device_printf(sc->dev, in max77620_pinmux_read_node()
294 &cfg->params[i], sizeof(cfg->params[i])); in max77620_pinmux_read_node()
296 cfg->params[i] = -1; in max77620_pinmux_read_node()
320 device_printf(sc->dev, in max77620_pinmux_process_node()
343 old_reg_pue = sc->gpio_reg_pue; in max77620_pinmux_configure()
344 old_reg_pde = sc->gpio_reg_pde; in max77620_pinmux_configure()
345 old_reg_ame = sc->gpio_reg_ame; in max77620_pinmux_configure()
356 if (old_reg_pue != sc->gpio_reg_pue) { in max77620_pinmux_configure()
357 rv = WR1(sc, MAX77620_REG_PUE_GPIO, sc->gpio_reg_pue); in max77620_pinmux_configure()
359 device_printf(sc->dev, in max77620_pinmux_configure()
365 if (old_reg_pde != sc->gpio_reg_pde) { in max77620_pinmux_configure()
366 rv = WR1(sc, MAX77620_REG_PDE_GPIO, sc->gpio_reg_pde); in max77620_pinmux_configure()
368 device_printf(sc->dev, in max77620_pinmux_configure()
374 if (old_reg_ame != sc->gpio_reg_ame) { in max77620_pinmux_configure()
375 rv = WR1(sc, MAX77620_REG_AME_GPIO, sc->gpio_reg_ame); in max77620_pinmux_configure()
377 device_printf(sc->dev, in max77620_pinmux_configure()
386 /* --------------------------------------------------------------------------
396 return (sc->gpio_busdev); in max77620_gpio_get_bus()
403 *maxpin = NGPIO - 1; in max77620_gpio_pin_max()
413 if (pin >= sc->gpio_npins) in max77620_gpio_pin_getcaps()
416 *caps = sc->gpio_pins[pin]->pin_caps; in max77620_gpio_pin_getcaps()
427 if (pin >= sc->gpio_npins) in max77620_gpio_pin_getname()
430 memcpy(name, sc->gpio_pins[pin]->pin_name, GPIOMAXNAME); in max77620_gpio_pin_getname()
443 pin = sc->gpio_pins[pin_num]; in max77620_gpio_get_mode()
446 rv = RD1(sc, pin->reg, ®); in max77620_gpio_get_mode()
448 device_printf(sc->dev, "Cannot read GIPO_CFG register\n"); in max77620_gpio_get_mode()
453 pin->alt_func = sc->gpio_reg_ame & (1 << pin_num); in max77620_gpio_get_mode()
456 if (sc->gpio_reg_pue & (1 << pin_num)) in max77620_gpio_get_mode()
458 if (sc->gpio_reg_pde & (1 << pin_num)) in max77620_gpio_get_mode()
461 /* Open drain/push-pull modes. */ in max77620_gpio_get_mode()
482 if (pin >= sc->gpio_npins) in max77620_gpio_pin_getflags()
488 if (sc->gpio_pins[pin]->alt_func) { in max77620_gpio_pin_getflags()
509 if (pin_num >= sc->gpio_npins) in max77620_gpio_pin_setflags()
512 pin = sc->gpio_pins[pin_num]; in max77620_gpio_pin_setflags()
518 if (pin->alt_func) { in max77620_gpio_pin_setflags()
524 old_reg_pue = sc->gpio_reg_pue; in max77620_gpio_pin_setflags()
525 old_reg_pde = sc->gpio_reg_pde; in max77620_gpio_pin_setflags()
527 rv = RD1(sc, pin->reg, ®); in max77620_gpio_pin_setflags()
529 device_printf(sc->dev, "Cannot read GIPO_CFG register\n"); in max77620_gpio_pin_setflags()
535 sc->gpio_reg_pue |= 1 << pin_num; in max77620_gpio_pin_setflags()
537 sc->gpio_reg_pue &= ~(1 << pin_num); in max77620_gpio_pin_setflags()
540 sc->gpio_reg_pde |= 1 << pin_num; in max77620_gpio_pin_setflags()
542 sc->gpio_reg_pde &= ~(1 << pin_num); in max77620_gpio_pin_setflags()
560 rv = WR1(sc, pin->reg, reg); in max77620_gpio_pin_setflags()
562 device_printf(sc->dev, "Cannot read GIPO_CFG register\n"); in max77620_gpio_pin_setflags()
565 if (old_reg_pue != sc->gpio_reg_pue) { in max77620_gpio_pin_setflags()
566 rv = WR1(sc, MAX77620_REG_PUE_GPIO, sc->gpio_reg_pue); in max77620_gpio_pin_setflags()
568 device_printf(sc->dev, in max77620_gpio_pin_setflags()
575 if (old_reg_pde != sc->gpio_reg_pde) { in max77620_gpio_pin_setflags()
576 rv = WR1(sc, MAX77620_REG_PDE_GPIO, sc->gpio_reg_pde); in max77620_gpio_pin_setflags()
578 device_printf(sc->dev, in max77620_gpio_pin_setflags()
596 if (pin >= sc->gpio_npins) in max77620_gpio_pin_set()
600 rv = RM1(sc, sc->gpio_pins[pin]->reg, MAX77620_REG_GPIO_OUTPUT_VAL(~0), in max77620_gpio_pin_set()
614 if (pin >= sc->gpio_npins) in max77620_gpio_pin_get()
618 rv = RD1(sc, sc->gpio_pins[pin]->reg, &tmp); in max77620_gpio_pin_get()
639 if (pin >= sc->gpio_npins) in max77620_gpio_pin_toggle()
643 rv = RD1(sc, sc->gpio_pins[pin]->reg, &tmp); in max77620_gpio_pin_toggle()
649 rv = RM1(sc, sc->gpio_pins[pin]->reg, MAX77620_REG_GPIO_OUTPUT_VAL(~0), in max77620_gpio_pin_toggle()
657 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) in max77620_gpio_map_gpios() argument
662 *pin = gpios[0]; in max77620_gpio_map_gpios()
663 *flags= gpios[1]; in max77620_gpio_map_gpios()
673 sx_init(&sc->gpio_lock, "MAX77620 GPIO lock"); in max77620_gpio_attach()
675 sc->gpio_busdev = gpiobus_attach_bus(sc->dev); in max77620_gpio_attach()
676 if (sc->gpio_busdev == NULL) in max77620_gpio_attach()
679 rv = RD1(sc, MAX77620_REG_PUE_GPIO, &sc->gpio_reg_pue); in max77620_gpio_attach()
681 device_printf(sc->dev, "Cannot read PUE_GPIO register\n"); in max77620_gpio_attach()
685 rv = RD1(sc, MAX77620_REG_PDE_GPIO, &sc->gpio_reg_pde); in max77620_gpio_attach()
687 device_printf(sc->dev, "Cannot read PDE_GPIO register\n"); in max77620_gpio_attach()
691 rv = RD1(sc, MAX77620_REG_AME_GPIO, &sc->gpio_reg_ame); in max77620_gpio_attach()
693 device_printf(sc->dev, "Cannot read AME_GPIO register\n"); in max77620_gpio_attach()
697 sc->gpio_npins = NGPIO; in max77620_gpio_attach()
698 sc->gpio_pins = malloc(sizeof(struct max77620_gpio_pin *) * in max77620_gpio_attach()
699 sc->gpio_npins, M_MAX77620_GPIO, M_WAITOK | M_ZERO); in max77620_gpio_attach()
700 for (i = 0; i < sc->gpio_npins; i++) { in max77620_gpio_attach()
701 sc->gpio_pins[i] = malloc(sizeof(struct max77620_gpio_pin), in max77620_gpio_attach()
703 pin = sc->gpio_pins[i]; in max77620_gpio_attach()
704 sprintf(pin->pin_name, "gpio%d", i); in max77620_gpio_attach()
705 pin->pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | in max77620_gpio_attach()
708 pin->reg = MAX77620_REG_GPIO0 + i; in max77620_gpio_attach()