Lines Matching +full:0 +full:x00070000
37 #define VFPCR_AHP (0x04000000) /* alt. half-precision: */
38 #define VFPCR_DN (0x02000000) /* default NaN enable */
39 #define VFPCR_FZ (0x01000000) /* flush to zero enabled */
40 #define VFPCR_INIT 0 /* Default fpcr after exec */
43 #define VFPCR_RMODE_MASK (0x00c00000) /* rounding mode mask */
44 #define VFPCR_RMODE_RN (0x00000000) /* round nearest */
45 #define VFPCR_RMODE_RPI (0x00400000) /* round to plus infinity */
46 #define VFPCR_RMODE_RNI (0x00800000) /* round to neg infinity */
47 #define VFPCR_RMODE_RM (0x00c00000) /* round to zero */
50 #define VFPCR_STRIDE_MASK (0x00300000)
52 #define VFPCR_LEN_MASK (0x00070000)
53 #define VFPCR_IDE (0x00008000) /* input subnormal exc enable */
54 #define VFPCR_IXE (0x00001000) /* inexact exception enable */
55 #define VFPCR_UFE (0x00000800) /* underflow exception enable */
56 #define VFPCR_OFE (0x00000400) /* overflow exception enable */
57 #define VFPCR_DZE (0x00000200) /* div by zero exception en */
58 #define VFPCR_IOE (0x00000100) /* invalid op exec enable */
95 #define FPU_KERN_NORMAL 0x0000
96 #define FPU_KERN_NOWAIT 0x0001
97 #define FPU_KERN_KTHR 0x0002
98 #define FPU_KERN_NOCTX 0x0004
112 #define VFP_FPSCR_FROM_SRCR(vpsr, vpcr) ((vpsr) | ((vpcr) & 0x7c00000))
113 #define VFP_FPSR_FROM_FPSCR(vpscr) ((vpscr) &~ 0x7c00000)
114 #define VFP_FPCR_FROM_FPSCR(vpsrc) ((vpsrc) & 0x7c00000)