Lines Matching +full:composite +full:- +full:mux +full:- +full:clock

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
68 		struct imx_clk_mux_def		*mux;  member
70 		struct imx_clk_composite_def	*composite;  member
77 /* Linked clock. */
90 /* Complex clock without divider (multiplexer only). */
91 #define MUX(_id, _name, _pn, _f,  _mo, _ms, _mw)			\  macro
94 	.clk.mux = &(struct imx_clk_mux_def) {				\
107 /* Fixed frequency clock */
134 /* Clock gate */
150 /* Root clock gate */
166 /* Composite clock with GATE, MUX, PRE_DIV, and POST_DIV */
167 #define COMPOSITE(_id, _name, _pn, _o, _flags)				\  macro
170 	.clk.composite = &(struct imx_clk_composite_def) {		\
185 	.clk.composite = &(struct imx_clk_composite_def) {		\