Lines Matching +full:bus +full:- +full:id
1 /*-
36 #include <sys/bus.h>
57 #include <machine/bus.h>
108 * Each PEM device creates its own bus with
109 * own address translation, so we can adjust bus addresses
110 * as we want. To support 32-bit cards let's assume
113 * 0x00000000 - 0x000FFFFF IO
114 * 0x00100000 - 0xFFFFFFFF Memory
170 /* Bus interface */
213 /* max slots per bus acc. to standard */ in thunder_pem_maxslots()
217 * ARM64TODO Workaround - otherwise an em(4) interface appears to be in thunder_pem_maxslots()
218 * present on every PCI function on the bus to which it is connected in thunder_pem_maxslots()
239 *result = sc->id; in thunder_pem_read_ivar()
262 return (pci_domain_activate_bus(sc->id, child, r)); in thunder_pem_activate_resource()
280 return (pci_domain_deactivate_bus(sc->id, child, r)); in thunder_pem_deactivate_resource()
316 start = range_addr_pci_to_phys(sc->ranges, start); in thunder_pem_map_resource()
317 error = bus_space_map(&memmap_bus, start, length, 0, &map->r_bushandle); in thunder_pem_map_resource()
320 map->r_bustag = &memmap_bus; in thunder_pem_map_resource()
321 map->r_vaddr = (void *)map->r_bushandle; in thunder_pem_map_resource()
322 map->r_size = length; in thunder_pem_map_resource()
334 bus_space_unmap(map->r_bustag, map->r_bushandle, map->r_size); in thunder_pem_unmap_resource()
350 return (pci_domain_adjust_bus(sc->id, child, res, start, end)); in thunder_pem_adjust_resource()
367 return (sc->dmat); in thunder_pem_get_dma_tag()
374 device_t bus; in thunder_pem_alloc_msi() local
376 bus = device_get_parent(pci); in thunder_pem_alloc_msi()
377 return (PCIB_ALLOC_MSI(device_get_parent(bus), child, count, maxcount, in thunder_pem_alloc_msi()
384 device_t bus; in thunder_pem_release_msi() local
386 bus = device_get_parent(pci); in thunder_pem_release_msi()
387 return (PCIB_RELEASE_MSI(device_get_parent(bus), child, count, irqs)); in thunder_pem_release_msi()
393 device_t bus; in thunder_pem_alloc_msix() local
395 bus = device_get_parent(pci); in thunder_pem_alloc_msix()
396 return (PCIB_ALLOC_MSIX(device_get_parent(bus), child, irq)); in thunder_pem_alloc_msix()
402 device_t bus; in thunder_pem_release_msix() local
404 bus = device_get_parent(pci); in thunder_pem_release_msix()
405 return (PCIB_RELEASE_MSIX(device_get_parent(bus), child, irq)); in thunder_pem_release_msix()
412 device_t bus; in thunder_pem_map_msi() local
414 bus = device_get_parent(pci); in thunder_pem_map_msi()
415 return (PCIB_MAP_MSI(device_get_parent(bus), child, irq, addr, data)); in thunder_pem_map_msi()
420 uintptr_t *id) in thunder_pem_get_id() argument
426 return (pcib_get_id(pci, child, type, id)); in thunder_pem_get_id()
434 * Set appropriate device ID (passed by the HW along with in thunder_pem_get_id()
436 * numbers using hard-coded domain portion for each group. in thunder_pem_get_id()
439 *id = (0x1 << PCI_RID_DOMAIN_SHIFT) | bsf; in thunder_pem_get_id()
441 *id = (0x3 << PCI_RID_DOMAIN_SHIFT) | bsf; in thunder_pem_get_id()
443 *id = (0x9 << PCI_RID_DOMAIN_SHIFT) | bsf; in thunder_pem_get_id()
445 *id = (0xB << PCI_RID_DOMAIN_SHIFT) | bsf; in thunder_pem_get_id()
459 start = rman_get_start(sc->reg); in thunder_pem_identify()
462 sc->node = (start >> SLI_NODE_SHIFT) & SLI_NODE_MASK; in thunder_pem_identify()
463 sc->id = ((start >> SLI_ID_SHIFT) & SLI_ID_MASK) + in thunder_pem_identify()
464 (SLI_PEMS_PER_NODE * sc->node); in thunder_pem_identify()
465 sc->sli = sc->id % SLI_PEMS_PER_GROUP; in thunder_pem_identify()
466 sc->sli_group = (sc->id / SLI_PEMS_PER_GROUP) % SLI_GROUPS_PER_NODE; in thunder_pem_identify()
467 sc->sli_window_base = SLI_BASE | in thunder_pem_identify()
468 (((uint64_t)sc->node) << SLI_NODE_SHIFT) | in thunder_pem_identify()
469 ((uint64_t)sc->sli_group << SLI_GROUP_SHIFT); in thunder_pem_identify()
470 sc->sli_window_base += SLI_WINDOW_SPACING * sc->sli; in thunder_pem_identify()
489 device_printf(sc->dev, "SLI group is not correct\n"); in thunder_pem_slix_s2m_regx_acc_modify()
492 /* Clear lower 32-bits of the SLIx register */ in thunder_pem_slix_s2m_regx_acc_modify()
493 regval = bus_space_read_8(sc->reg_bst, handle, in thunder_pem_slix_s2m_regx_acc_modify()
496 bus_space_write_8(sc->reg_bst, handle, in thunder_pem_slix_s2m_regx_acc_modify()
507 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_ON_REG); in thunder_pem_link_init()
509 device_printf(sc->dev, "PEM%d is not ON\n", sc->id); in thunder_pem_link_init()
513 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS); in thunder_pem_link_init()
515 bus_space_write_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS, regval); in thunder_pem_link_init()
523 device_printf(sc->dev, "PCIe RC: Port %d Link Timeout\n", in thunder_pem_link_init()
524 sc->id); in thunder_pem_link_init()
538 device_printf(sc->dev, "%s failed\n", __func__); in thunder_pem_init()
542 /* To support 32-bit PCIe devices, set S2M_REGx_ACC[BA]=0x0 */ in thunder_pem_init()
544 thunder_pem_slix_s2m_regx_acc_modify(sc, sc->sli_group, i); in thunder_pem_init()
556 bus_space_write_8(sc->reg_bst, sc->reg_bsh, PEM_CFG_RD, in thunder_pem_config_reg_read()
558 bus_space_barrier(sc->reg_bst, sc->reg_bsh, PEM_CFG_RD, 8, in thunder_pem_config_reg_read()
561 data = PEM_CFG_RD_REG_DATA(bus_space_read_8(sc->reg_bst, sc->reg_bsh, in thunder_pem_config_reg_read()
568 thunder_pem_read_config(device_t dev, u_int bus, u_int slot, in thunder_pem_read_config() argument
577 if ((bus > PCI_BUSMAX) || (slot > PCI_SLOTMAX) || in thunder_pem_read_config()
584 offset = (bus << PEM_BUS_SHIFT) | (slot << PEM_SLOT_SHIFT) | in thunder_pem_read_config()
586 t = sc->reg_bst; in thunder_pem_read_config()
587 h = sc->pem_sli_base; in thunder_pem_read_config()
589 bus_space_map(sc->reg_bst, sc->sli_window_base + offset, in thunder_pem_read_config()
607 bus_space_unmap(sc->reg_bst, h, PCIE_REGMAX); in thunder_pem_read_config()
613 thunder_pem_write_config(device_t dev, u_int bus, u_int slot, in thunder_pem_write_config() argument
621 if ((bus > PCI_BUSMAX) || (slot > PCI_SLOTMAX) || in thunder_pem_write_config()
628 offset = (bus << PEM_BUS_SHIFT) | (slot << PEM_SLOT_SHIFT) | in thunder_pem_write_config()
630 t = sc->reg_bst; in thunder_pem_write_config()
631 h = sc->pem_sli_base; in thunder_pem_write_config()
633 bus_space_map(sc->reg_bst, sc->sli_window_base + offset, in thunder_pem_write_config()
650 bus_space_unmap(sc->reg_bst, h, PCIE_REGMAX); in thunder_pem_write_config()
663 return (pci_domain_alloc_bus(sc->id, child, rid, start, end, in thunder_pem_alloc_resource()
680 if (range_addr_is_phys(sc->ranges, start, count)) { in thunder_pem_alloc_resource()
681 start = range_addr_phys_to_pci(sc->ranges, start); in thunder_pem_alloc_resource()
682 end = start + count - 1; in thunder_pem_alloc_resource()
711 return (pci_domain_release_bus(sc->id, child, res)); in thunder_pem_release_resource()
723 thunder_pem_get_rman(device_t bus, int type, u_int flags) in thunder_pem_get_rman() argument
727 sc = device_get_softc(bus); in thunder_pem_get_rman()
730 return (&sc->io_rman); in thunder_pem_get_rman()
732 return (&sc->mem_rman); in thunder_pem_get_rman()
773 sc->dev = dev; in thunder_pem_attach()
783 sc->reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, in thunder_pem_attach()
785 if (sc->reg == NULL) { in thunder_pem_attach()
791 error = bus_map_resource(dev, SYS_RES_MEMORY, sc->reg, &req, &map); in thunder_pem_attach()
796 rman_set_mapping(sc->reg, &map); in thunder_pem_attach()
798 sc->reg_bst = rman_get_bustag(sc->reg); in thunder_pem_attach()
799 sc->reg_bsh = rman_get_bushandle(sc->reg); in thunder_pem_attach()
812 &sc->dmat); in thunder_pem_attach()
818 bus_space_map(sc->reg_bst, SLIX_S2M_REGX_ACC, in thunder_pem_attach()
822 bus_space_map(sc->reg_bst, SLIX_S2M_REGX_ACC + in thunder_pem_attach()
838 sc->mem_rman.rm_type = RMAN_ARRAY; in thunder_pem_attach()
839 sc->mem_rman.rm_descr = "PEM PCIe Memory"; in thunder_pem_attach()
840 error = rman_init(&sc->mem_rman); in thunder_pem_attach()
846 sc->io_rman.rm_type = RMAN_ARRAY; in thunder_pem_attach()
847 sc->io_rman.rm_descr = "PEM PCIe IO"; in thunder_pem_attach()
848 error = rman_init(&sc->io_rman); in thunder_pem_attach()
863 sc->ranges[0].pci_base = PCI_MEMORY_BASE; in thunder_pem_attach()
864 sc->ranges[0].size = PCI_MEMORY_SIZE; in thunder_pem_attach()
865 sc->ranges[0].phys_base = sc->sli_window_base + SLI_PCI_OFFSET + in thunder_pem_attach()
866 sc->ranges[0].pci_base; in thunder_pem_attach()
867 sc->ranges[0].flags = SYS_RES_MEMORY; in thunder_pem_attach()
870 sc->ranges[1].pci_base = PCI_IO_BASE; in thunder_pem_attach()
871 sc->ranges[1].size = PCI_IO_SIZE; in thunder_pem_attach()
872 sc->ranges[1].phys_base = sc->sli_window_base + SLI_PCI_OFFSET + in thunder_pem_attach()
873 sc->ranges[1].pci_base; in thunder_pem_attach()
874 sc->ranges[1].flags = SYS_RES_IOPORT; in thunder_pem_attach()
877 base = sc->ranges[tuple].pci_base; in thunder_pem_attach()
878 size = sc->ranges[tuple].size; in thunder_pem_attach()
882 rman = thunder_pem_get_rman(dev, sc->ranges[tuple].flags, 0); in thunder_pem_attach()
885 base + size - 1); in thunder_pem_attach()
891 rman_fini(&sc->mem_rman); in thunder_pem_attach()
897 sc->ranges[tuple].pci_base, in thunder_pem_attach()
898 sc->ranges[tuple].phys_base, in thunder_pem_attach()
899 sc->ranges[tuple].size, in thunder_pem_attach()
900 sc->ranges[tuple].flags); in thunder_pem_attach()
914 rman_fini(&sc->io_rman); in thunder_pem_attach()
916 rman_fini(&sc->mem_rman); in thunder_pem_attach()
918 bus_free_resource(dev, SYS_RES_MEMORY, sc->reg); in thunder_pem_attach()
929 rman_fini(&sc->io_rman); in thunder_pem_release_all()
930 rman_fini(&sc->mem_rman); in thunder_pem_release_all()
932 if (sc->reg != NULL) in thunder_pem_release_all()
933 bus_free_resource(dev, SYS_RES_MEMORY, sc->reg); in thunder_pem_release_all()