97 #define WR4(sc, off, val) 	(bus_write_4((sc)->mem_res, (off), (val)))  macro
402 	WR4(sc, ZY7_DEVCFG_CTRL,  in zy7_devcfg_init_hw()
415 	WR4(sc, ZY7_DEVCFG_MCTRL, RD4(sc, ZY7_DEVCFG_MCTRL) &  in zy7_devcfg_init_hw()
431 	WR4(sc, ZY7_DEVCFG_INT_STATUS, ZY7_DEVCFG_INT_ALL);  in zy7_devcfg_reset_pl()
432 	WR4(sc, ZY7_DEVCFG_INT_MASK, ~ZY7_DEVCFG_INT_PCFG_INIT_PE);  in zy7_devcfg_reset_pl()
436 	WR4(sc, ZY7_DEVCFG_CTRL, devcfg_ctl);  in zy7_devcfg_reset_pl()
445 		WR4(sc, ZY7_DEVCFG_INT_MASK, ~0);  in zy7_devcfg_reset_pl()
456 	WR4(sc, ZY7_DEVCFG_CTRL, devcfg_ctl);  in zy7_devcfg_reset_pl()
468 	WR4(sc, ZY7_DEVCFG_INT_STATUS, ZY7_DEVCFG_INT_ALL);  in zy7_devcfg_reset_pl()
469 	WR4(sc, ZY7_DEVCFG_INT_MASK, ~ZY7_DEVCFG_INT_PCFG_INIT_PE);  in zy7_devcfg_reset_pl()
473 	WR4(sc, ZY7_DEVCFG_CTRL, devcfg_ctl);  in zy7_devcfg_reset_pl()
484 	WR4(sc, ZY7_DEVCFG_INT_STATUS, ZY7_DEVCFG_INT_ALL);  in zy7_devcfg_reset_pl()
591 			WR4(sc, ZY7_DEVCFG_DMA_SRC_ADDR,  in zy7_devcfg_write()
594 			WR4(sc, ZY7_DEVCFG_DMA_SRC_ADDR,  in zy7_devcfg_write()
597 		WR4(sc, ZY7_DEVCFG_DMA_DST_ADDR, ZY7_DEVCFG_DMA_ADDR_ILLEGAL);  in zy7_devcfg_write()
598 		WR4(sc, ZY7_DEVCFG_DMA_SRC_LEN, (segsz+3)/4);  in zy7_devcfg_write()
599 		WR4(sc, ZY7_DEVCFG_DMA_DST_LEN, 0);  in zy7_devcfg_write()
602 		WR4(sc, ZY7_DEVCFG_INT_STATUS, ZY7_DEVCFG_INT_ALL);  in zy7_devcfg_write()
603 		WR4(sc, ZY7_DEVCFG_INT_MASK, ~ZY7_DEVCFG_INT_DMA_DONE);  in zy7_devcfg_write()
653 	WR4(sc, ZY7_DEVCFG_INT_MASK, ~0);  in zy7_devcfg_intr()
683 		WR4(sc, ZY7_DEVCFG_INT_STATUS, ZY7_DEVCFG_INT_PCFG_DONE);  in zy7_devcfg_sysctl_pl_done()
765 	WR4(sc, ZY7_DEVCFG_UNLOCK, ZY7_DEVCFG_UNLOCK_MAGIC);  in zy7_devcfg_attach()
768 	WR4(sc, ZY7_DEVCFG_INT_STATUS, ZY7_DEVCFG_INT_ALL);  in zy7_devcfg_attach()
769 	WR4(sc, ZY7_DEVCFG_INT_MASK, 0xffffffff);  in zy7_devcfg_attach()