1 /*-
61 /* Documentation/devicetree/bindings/bus/ti-sysc.txt
63  * Documentation/devicetree/clock/clock-bindings.txt
65  * Documentation/devicetree/clock/ti-clkctl.txt
91 	{ "ti,sysc-dra7-mcan",		TI_SYSC_DRA7_MCAN },
92 	{ "ti,sysc-usb-host-fs",	TI_SYSC_USB_HOST_FS },
93 	{ "ti,sysc-dra7-mcasp",		TI_SYSC_DRA7_MCASP },
94 	{ "ti,sysc-mcasp",		TI_SYSC_MCASP },
95 	{ "ti,sysc-omap-aes",		TI_SYSC_OMAP_AES },
96 	{ "ti,sysc-omap3-sham",		TI_SYSC_OMAP3_SHAM },
97 	{ "ti,sysc-omap4-sr",		TI_SYSC_OMAP4_SR },
98 	{ "ti,sysc-omap3630-sr",	TI_SYSC_OMAP3630_SR },
99 	{ "ti,sysc-omap3430-sr",	TI_SYSC_OMAP3430_SR },
100 	{ "ti,sysc-omap4-timer",	TI_SYSC_OMAP4_TIMER },
101 	{ "ti,sysc-omap2-timer",	TI_SYSC_OMAP2_TIMER },
103 	{ "ti,sysc-omap4-simple",	TI_SYSC_OMAP4_SIMPLE },
104 	{ "ti,sysc-omap4",		TI_SYSC_OMAP4 },
105 	{ "ti,sysc-omap2",		TI_SYSC_OMAP2 },
106 	{ "ti,sysc",			TI_SYSC },
110 /* reg-names can be "rev", "sysc" and "syss" */
111 static const char * reg_names[] = { "rev", "sysc", "syss" };
118 #include <dt-bindings/bus/ti-sysc.h>
158  * All sysc seems to have a reg["rev"] register.
165 	return (sc->reg[REG_REV].address);  in ti_sysc_get_rev_address()
172 	return (sc->offset_reg[REG_REV]);  in ti_sysc_get_rev_address_offset_host()
179 	return (sc->reg[REG_SYSC].address);  in ti_sysc_get_sysc_address()
186 	return (sc->offset_reg[REG_SYSC]);  in ti_sysc_get_sysc_address_offset_host()
193 	return (sc->reg[REG_SYSS].address);  in ti_sysc_get_syss_address()
200 	return (sc->offset_reg[REG_SYSS]);  in ti_sysc_get_syss_address_offset_host()
204  * Due no memory region is assigned the sysc driver the children needs to
206  * Check if sysc has reset bit.
211 	switch (sc->device_type) {  in ti_sysc_get_soft_reset_bit()
215 			if (sc->ti_sysc_mask & SYSC_OMAP4_SOFTRESET) {  in ti_sysc_get_soft_reset_bit()
223 			if (sc->ti_sysc_mask & SYSC_OMAP2_SOFTRESET) {  in ti_sysc_get_soft_reset_bit()
240 	TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {  in ti_sysc_clock_enable()
241 		err = clk_enable(clkp->clk);  in ti_sysc_clock_enable()
244 			DPRINTF(sc->dev, "clk_enable %s failed %d\n",  in ti_sysc_clock_enable()
245 				clk_get_name(clkp->clk), err);  in ti_sysc_clock_enable()
258 	TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {  in ti_sysc_clock_disable()
259 		err = clk_disable(clkp->clk);  in ti_sysc_clock_disable()
262 			DPRINTF(sc->dev, "clk_enable %s failed %d\n",  in ti_sysc_clock_disable()
263 				clk_get_name(clkp->clk), err);  in ti_sysc_clock_disable()
280 	node = ofw_bus_get_node(sc->dev);  in parse_regfields()
283 	err = OF_searchencprop(OF_parent(node), "#address-cells",  in parse_regfields()
285 	if (err == -1)  in parse_regfields()
288 		DPRINTF(sc->dev, "Expect parent #address-cells=[1||2]\n");  in parse_regfields()
292 	err = OF_searchencprop(OF_parent(node), "#size-cells",  in parse_regfields()
294 	if (err == -1)  in parse_regfields()
298 		DPRINTF(sc->dev, "Expect parent #size-cells = [1||2]\n");  in parse_regfields()
312 		sc->reg[idx].address = 0;  in parse_regfields()
313 		sc->reg[idx].size = 0;  in parse_regfields()
316 	/* Loop through reg-names and figure out which reg-name corresponds to  in parse_regfields()
320 		err = ofw_bus_find_string_index(node, "reg-names",  in parse_regfields()
326 			sc->reg[prop_idx].address <<= 32;  in parse_regfields()
327 			sc->reg[prop_idx].address |= reg[reg_i++];  in parse_regfields()
331 			sc->reg[prop_idx].size <<= 32;  in parse_regfields()
332 			sc->reg[prop_idx].size |= reg[reg_i++];  in parse_regfields()
335 		if (sc->sc.nranges == 0)  in parse_regfields()
336 			sc->offset_reg[prop_idx] = sc->reg[prop_idx].address;  in parse_regfields()
338 			sc->offset_reg[prop_idx] = sc->reg[prop_idx].address -  in parse_regfields()
339 			    sc->sc.ranges[REG_REV].host;  in parse_regfields()
341 		DPRINTF(sc->dev, "reg[%s] address %#jx size %#jx\n",  in parse_regfields()
343 			sc->reg[prop_idx].address,  in parse_regfields()
344 			sc->reg[prop_idx].size);  in parse_regfields()
356 	node = ofw_bus_get_node(sc->dev);  in parse_idle()
365 		DPRINTF(sc->dev, "Limit %s\n", name);  in parse_idle()
366 		no = SYSC_IDLE_MAX-1;  in parse_idle()
374 		DPRINTF(sc->dev, "%s[%d] = %d ",  in parse_idle()
378 			DPRINTF(sc->dev, "SYSC_IDLE_FORCE\n");  in parse_idle()
381 			DPRINTF(sc->dev, "SYSC_IDLE_NO\n");  in parse_idle()
384 			DPRINTF(sc->dev, "SYSC_IDLE_SMART\n");  in parse_idle()
387 			DPRINTF(sc->dev, "SYSC_IDLE_SMART_WKUP\n");  in parse_idle()
393 		idle[i] = -1;  in parse_idle()
402 	clk = malloc(sc->num_clocks*sizeof(clk_t), M_DEVBUF, M_WAITOK | M_ZERO);  in ti_sysc_attach_clocks()
405 	for (index = 0; index < sc->num_clocks; index++) {  in ti_sysc_attach_clocks()
406 		err = clk_get_by_ofw_index(sc->dev, 0, index, &clk[index]);  in ti_sysc_attach_clocks()
415 	for (index = 0; index < sc->num_clocks; index++) {  in ti_sysc_attach_clocks()
417 		clkp->clk = clk[index];  in ti_sysc_attach_clocks()
418 		TAILQ_INSERT_TAIL(&sc->clk_list, clkp, next);  in ti_sysc_attach_clocks()
432 	node = ofw_bus_get_node(sc->dev);  in ti_sysc_simplebus_attach_child()
435 		cdev = simplebus_add_device(sc->dev, child, 0, NULL, -1, NULL);  in ti_sysc_simplebus_attach_child()
449 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)  in ti_sysc_probe()
452 	device_set_desc(dev, "TI SYSC Interconnect");  in ti_sysc_probe()
466 	sc->dev = dev;  in ti_sysc_attach()
467 	sc->device_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;  in ti_sysc_attach()
469 	node = ofw_bus_get_node(sc->dev);  in ti_sysc_attach()
470 	/* ranges - use simplebus */  in ti_sysc_attach()
471 	simplebus_init(sc->dev, node);  in ti_sysc_attach()
472 	if (simplebus_fill_ranges(node, &sc->sc) < 0) {  in ti_sysc_attach()
473 		DPRINTF(sc->dev, "could not get ranges\n");  in ti_sysc_attach()
477 	if (sc->sc.nranges == 0) {  in ti_sysc_attach()
478 		DPRINTF(sc->dev, "nranges == 0\n");  in ti_sysc_attach()
482 	/* Required field reg & reg-names - assume at least "rev" exists */  in ti_sysc_attach()
485 		DPRINTF(sc->dev, "parse_regfields failed %d\n", err);  in ti_sysc_attach()
490 	if (OF_hasprop(node, "ti,sysc-mask")) {  in ti_sysc_attach()
491 		OF_getencprop(node, "ti,sysc-mask", &value, sizeof(cell_t));  in ti_sysc_attach()
492 		sc->ti_sysc_mask = value;  in ti_sysc_attach()
494 	if (OF_hasprop(node, "ti,syss-mask")) {  in ti_sysc_attach()
495 		OF_getencprop(node, "ti,syss-mask", &value, sizeof(cell_t));  in ti_sysc_attach()
496 		sc->ti_syss_mask = value;  in ti_sysc_attach()
498 	if (OF_hasprop(node, "ti,sysc-delay-us")) {  in ti_sysc_attach()
499 		OF_getencprop(node, "ti,sysc-delay-us", &value, sizeof(cell_t));  in ti_sysc_attach()
500 		sc->ti_sysc_delay_us = value;  in ti_sysc_attach()
503 	DPRINTF(sc->dev, "sysc_mask %x syss_mask %x delay_us %x\n",  in ti_sysc_attach()
504 		sc->ti_sysc_mask, sc->ti_syss_mask, sc->ti_sysc_delay_us);  in ti_sysc_attach()
506 	parse_idle(sc, "ti,sysc-midle", sc->ti_sysc_midle);  in ti_sysc_attach()
507 	parse_idle(sc, "ti,sysc-sidle", sc->ti_sysc_sidle);  in ti_sysc_attach()
509 	if (OF_hasprop(node, "ti,no-reset-on-init"))  in ti_sysc_attach()
510 		sc->ti_no_reset_on_init = true;  in ti_sysc_attach()
512 		sc->ti_no_reset_on_init = false;  in ti_sysc_attach()
514 	if (OF_hasprop(node, "ti,no-idle-on-init"))  in ti_sysc_attach()
515 		sc->ti_no_idle_on_init = true;  in ti_sysc_attach()
517 		sc->ti_no_idle_on_init = false;  in ti_sysc_attach()
519 	if (OF_hasprop(node, "ti,no-idle"))  in ti_sysc_attach()
520 		sc->ti_no_idle = true;  in ti_sysc_attach()
522 		sc->ti_no_idle = false;  in ti_sysc_attach()
524 	DPRINTF(sc->dev,  in ti_sysc_attach()
525 		"no-reset-on-init %d, no-idle-on-init %d, no-idle %d\n",  in ti_sysc_attach()
526 		sc->ti_no_reset_on_init,  in ti_sysc_attach()
527 		sc->ti_no_idle_on_init,  in ti_sysc_attach()
528 		sc->ti_no_idle);  in ti_sysc_attach()
532 		read_clock_cells(sc->dev, &cell_info);  in ti_sysc_attach()
536 		sc->num_clocks = cell_info.num_real_clocks;  in ti_sysc_attach()
537 		TAILQ_INIT(&sc->clk_list);  in ti_sysc_attach()
541 			DPRINTF(sc->dev, "Failed to attach clocks\n");  in ti_sysc_attach()
542 			bus_attach_children(sc->dev);  in ti_sysc_attach()
547 	err = ti_sysc_simplebus_attach_child(sc->dev);  in ti_sysc_attach()
549 		DPRINTF(sc->dev, "ti_sysc_simplebus_attach_child %d\n",  in ti_sysc_attach()
554 	sc->attach_done = true;  in ti_sysc_attach()
556 	bus_attach_children(sc->dev);  in ti_sysc_attach()
576 	if (sc->attach_done) {  in ti_sysc_new_pass()
577 		bus_generic_new_pass(sc->dev);  in ti_sysc_new_pass()
581 	node = ofw_bus_get_node(sc->dev);  in ti_sysc_new_pass()
585 			DPRINTF(sc->dev, "Failed to attach clocks\n");  in ti_sysc_new_pass()
590 	err = ti_sysc_simplebus_attach_child(sc->dev);  in ti_sysc_new_pass()
592 		DPRINTF(sc->dev,  in ti_sysc_new_pass()
596 	sc->attach_done = true;  in ti_sysc_new_pass()
598 	bus_attach_children(sc->dev);  in ti_sysc_new_pass()