1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
31  * Beware that the OMAP4 datasheet(s) lists GPIO banks 1-6, whereas the code
32  * here uses 0-5.
154 #define	TI_GPIO_LOCK(_sc)		mtx_lock_spin(&(_sc)->sc_mtx)
155 #define	TI_GPIO_UNLOCK(_sc)		mtx_unlock_spin(&(_sc)->sc_mtx)
157 	mtx_init(&_sc->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
159 #define	TI_GPIO_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_mtx)
160 #define	TI_GPIO_ASSERT_LOCKED(_sc)	mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
161 #define	TI_GPIO_ASSERT_UNLOCKED(_sc)	mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED)
164  *	ti_gpio_read_4 - reads a 32-bit value from one of the GPIO registers
171  *	32-bit value read from the register.
176 	return (bus_read_4(sc->sc_mem_res, off));  in ti_gpio_read_4()
180  *	ti_gpio_write_4 - writes a 32-bit value to one of the GPIO registers
193 	bus_write_4(sc->sc_mem_res, off, val);  in ti_gpio_write_4()
247 	return (sc->sc_busdev);  in ti_gpio_get_bus()
251  *	ti_gpio_pin_max - Returns the maximum number of GPIO pins
267 	*maxpin = PINS_PER_BANK - 1;  in ti_gpio_pin_max()
276 	if (pin >= sc->sc_maxpin || sc->sc_mem_res == NULL)  in ti_gpio_valid_pin()
283  *	ti_gpio_pin_getcaps - Gets the capabilities of a given pin
289  *	  - GPIO_PIN_INPUT
290  *	  - GPIO_PIN_OUTPUT
291  *	  - GPIO_PIN_PULLUP
292  *	  - GPIO_PIN_PULLDOWN
293  *	  - GPIO_INTR_LEVEL_LOW
294  *	  - GPIO_INTR_LEVEL_HIGH
295  *	  - GPIO_INTR_EDGE_RISING
296  *	  - GPIO_INTR_EDGE_FALLING
297  *	  - GPIO_INTR_EDGE_BOTH
323  *	ti_gpio_pin_getflags - Gets the current flags of a given pin
356  *	ti_gpio_pin_getname - Gets the name of a given pin
381 	name[GPIOMAXNAME - 1] = '\0';  in ti_gpio_pin_getname()
387  *	ti_gpio_pin_setflags - Sets the flags for a given pin
392  *	The flags of the pin correspond to things like input/output mode, pull-ups,
393  *	pull-downs, etc.  This driver doesn't support all flags, only the following:
394  *	  - GPIO_PIN_INPUT
395  *	  - GPIO_PIN_OUTPUT
396  *	  - GPIO_PIN_PULLUP
397  *	  - GPIO_PIN_PULLDOWN
435  *	ti_gpio_pin_set - Sets the current level on a GPIO pin
438  *	@value: non-zero value will drive the pin high, otherwise the pin is
470  *	ti_gpio_pin_get - Gets the current level on a GPIO pin
512  *	ti_gpio_pin_toggle - Toggles a given GPIO pin
559 	 * sc->sc_bank used in am335x/am335x_gpio.c and omap4/omap4_gpio.c */  in ti_gpio_bank_init()
565 				sc->sc_bank = 0;  in ti_gpio_bank_init()
568 				sc->sc_bank = 1;  in ti_gpio_bank_init()
571 				sc->sc_bank = 2;  in ti_gpio_bank_init()
574 				sc->sc_bank = 3;  in ti_gpio_bank_init()
577 				sc->sc_bank = 4;  in ti_gpio_bank_init()
580 				sc->sc_bank = 5;  in ti_gpio_bank_init()
588 				sc->sc_bank = 0;  in ti_gpio_bank_init()
591 				sc->sc_bank = 1;  in ti_gpio_bank_init()
594 				sc->sc_bank = 2;  in ti_gpio_bank_init()
597 				sc->sc_bank = 3;  in ti_gpio_bank_init()
645  *	ti_gpio_attach - attach function for the driver
664 	sc->sc_dev = dev;  in ti_gpio_attach()
666 	ti_gpio_pin_max(dev, &sc->sc_maxpin);  in ti_gpio_attach()
667 	sc->sc_maxpin++;  in ti_gpio_attach()
669 	sc->sc_mem_rid = 0;  in ti_gpio_attach()
670 	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,  in ti_gpio_attach()
671 	    &sc->sc_mem_rid, RF_ACTIVE);  in ti_gpio_attach()
672 	if (!sc->sc_mem_res) {  in ti_gpio_attach()
678 	sc->sc_irq_rid = 0;  in ti_gpio_attach()
679 	sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,  in ti_gpio_attach()
680 	    &sc->sc_irq_rid, RF_ACTIVE);  in ti_gpio_attach()
681 	if (!sc->sc_irq_res) {  in ti_gpio_attach()
690 	if (bus_setup_intr(dev, sc->sc_irq_res,  in ti_gpio_attach()
692 	    &sc->sc_irq_hdl) != 0) {  in ti_gpio_attach()
710 	if (sc->sc_mem_res != NULL) {  in ti_gpio_attach()
719 	sc->sc_busdev = gpiobus_attach_bus(dev);  in ti_gpio_attach()
720 	if (sc->sc_busdev == NULL) {  in ti_gpio_attach()
729  *	ti_gpio_detach - detach function for the driver
746 	KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized"));  in ti_gpio_detach()
749 	if (sc->sc_mem_res != NULL)  in ti_gpio_detach()
751 	if (sc->sc_busdev != NULL)  in ti_gpio_detach()
753 	if (sc->sc_isrcs != NULL)  in ti_gpio_detach()
756 	if (sc->sc_irq_hdl) {  in ti_gpio_detach()
757 		bus_teardown_intr(dev, sc->sc_irq_res,  in ti_gpio_detach()
758 		    sc->sc_irq_hdl);  in ti_gpio_detach()
760 	if (sc->sc_irq_res)  in ti_gpio_detach()
761 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,  in ti_gpio_detach()
762 		    sc->sc_irq_res);  in ti_gpio_detach()
763 	if (sc->sc_mem_res)  in ti_gpio_detach()
764 		bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid,  in ti_gpio_detach()
765 		    sc->sc_mem_res);  in ti_gpio_detach()
786 	ti_gpio_intr_clr(sc, tgi->tgi_mask);  in ti_gpio_isrc_mask()
794 	ti_gpio_intr_set(sc, tgi->tgi_mask);  in ti_gpio_isrc_unmask()
802 	ti_gpio_intr_ack(sc, tgi->tgi_mask);  in ti_gpio_isrc_eoi()
809 	return (tgi->tgi_mode == GPIO_INTR_LEVEL_LOW ||  in ti_gpio_isrc_is_level()
810 	    tgi->tgi_mode == GPIO_INTR_LEVEL_HIGH);  in ti_gpio_isrc_is_level()
823 	tf = curthread->td_intr_frame;  in ti_gpio_intr()
826 	for (irq = 0; irq < sc->sc_maxpin; irq++) {  in ti_gpio_intr()
827 		tgi = &sc->sc_isrcs[irq];  in ti_gpio_intr()
828 		if ((reg & tgi->tgi_mask) == 0)  in ti_gpio_intr()
832 		if (intr_isrc_dispatch(&tgi->tgi_isrc, tf) != 0) {  in ti_gpio_intr()
836 			device_printf(sc->sc_dev, "Stray irq %u disabled\n",  in ti_gpio_intr()
850 	sc->sc_isrcs = malloc(sizeof(*sc->sc_isrcs) * sc->sc_maxpin, M_DEVBUF,  in ti_gpio_pic_attach()
853 	name = device_get_nameunit(sc->sc_dev);  in ti_gpio_pic_attach()
854 	for (irq = 0; irq < sc->sc_maxpin; irq++) {  in ti_gpio_pic_attach()
855 		sc->sc_isrcs[irq].tgi_irq = irq;  in ti_gpio_pic_attach()
856 		sc->sc_isrcs[irq].tgi_mask = TI_GPIO_MASK(irq);  in ti_gpio_pic_attach()
857 		sc->sc_isrcs[irq].tgi_mode = GPIO_INTR_CONFORM;  in ti_gpio_pic_attach()
859 		error = intr_isrc_register(&sc->sc_isrcs[irq].tgi_isrc,  in ti_gpio_pic_attach()
860 		    sc->sc_dev, 0, "%s,%u", name, irq);  in ti_gpio_pic_attach()
864 	if (intr_pic_register(sc->sc_dev,  in ti_gpio_pic_attach()
865 	    OF_xref_from_node(ofw_bus_get_node(sc->sc_dev))) == NULL)  in ti_gpio_pic_attach()
879 	device_printf(sc->sc_dev, "%s: not implemented yet\n", __func__);  in ti_gpio_pic_detach()
889 	ti_gpio_rwreg_modify(sc, TI_GPIO_RISINGDETECT, tgi->tgi_mask,  in ti_gpio_pic_config_intr()
891 	ti_gpio_rwreg_modify(sc, TI_GPIO_FALLINGDETECT, tgi->tgi_mask,  in ti_gpio_pic_config_intr()
893 	ti_gpio_rwreg_modify(sc, TI_GPIO_LEVELDETECT1, tgi->tgi_mask,  in ti_gpio_pic_config_intr()
895 	ti_gpio_rwreg_modify(sc, TI_GPIO_LEVELDETECT0, tgi->tgi_mask,  in ti_gpio_pic_config_intr()
897 	tgi->tgi_mode = mode;  in ti_gpio_pic_config_intr()
916 	arm_irq_memory_barrier(tgi->tgi_irq);  in ti_gpio_pic_enable_intr()
930 	 *		1 = low-to-high edge triggered.  in ti_gpio_pic_map_fdt()
931 	 *		2 = high-to-low edge triggered.  in ti_gpio_pic_map_fdt()
932 	 *		4 = active high level-sensitive.  in ti_gpio_pic_map_fdt()
933 	 *		8 = active low level-sensitive.  in ti_gpio_pic_map_fdt()
935 	if (daf->ncells != 2 || daf->cells[0] >= sc->sc_maxpin)  in ti_gpio_pic_map_fdt()
939 	if (daf->cells[1] == 1)  in ti_gpio_pic_map_fdt()
941 	else if (daf->cells[1] == 2)  in ti_gpio_pic_map_fdt()
943 	else if (daf->cells[1] == 3)  in ti_gpio_pic_map_fdt()
945 	else if (daf->cells[1] == 4)  in ti_gpio_pic_map_fdt()
947 	else if (daf->cells[1] == 8)  in ti_gpio_pic_map_fdt()
952 	*irqp = daf->cells[0];  in ti_gpio_pic_map_fdt()
964 	if (dag->gpio_pin_num >= sc->sc_maxpin)  in ti_gpio_pic_map_gpio()
967 	mode = dag->gpio_intr_mode;  in ti_gpio_pic_map_gpio()
973 	*irqp = dag->gpio_pin_num;  in ti_gpio_pic_map_gpio()
984 	switch (data->type) {  in ti_gpio_pic_map()
1006 		*isrcp = &sc->sc_isrcs[irq].tgi_isrc;  in ti_gpio_pic_map_intr()
1054 	if (ti_gpio_pic_map(sc, data, &irq, &mode) != 0 || tgi->tgi_irq != irq)  in ti_gpio_pic_setup_intr()
1061 	if (isrc->isrc_handlers != 0)  in ti_gpio_pic_setup_intr()
1062 		return (tgi->tgi_mode == mode ? 0 : EINVAL);  in ti_gpio_pic_setup_intr()
1075 	if (isrc->isrc_handlers == 0)  in ti_gpio_pic_teardown_intr()