Lines Matching +full:0 +full:x028

30 #define	ADC_REVISION		0x000
31 #define	ADC_REV_SCHEME_MSK		0xc0000000
33 #define	ADC_REV_FUNC_MSK		0x0fff0000
35 #define	ADC_REV_RTL_MSK			0x0000f800
37 #define	ADC_REV_MAJOR_MSK		0x00000700
39 #define	ADC_REV_CUSTOM_MSK		0x000000c0
41 #define	ADC_REV_MINOR_MSK		0x0000003f
42 #define	ADC_SYSCFG		0x010
43 #define	ADC_SYSCFG_IDLE_MSK		0x000000c0
45 #define	ADC_IRQSTATUS_RAW	0x024
46 #define	ADC_IRQSTATUS		0x028
47 #define	ADC_IRQENABLE_SET	0x02c
48 #define	ADC_IRQENABLE_CLR	0x030
59 #define	ADC_IRQ_HW_PEN_ASYNC		(1 << 0)
60 #define	ADC_CTRL		0x040
67 #define	ADC_CTRL_ENABLE			(1 << 0)
68 #define	ADC_STAT		0x044
69 #define	ADC_CLKDIV		0x04c
70 #define	ADC_STEPENABLE		0x054
71 #define	ADC_IDLECONFIG		0x058
72 #define	ADC_TC_CHARGE_STEPCONFIG	0x05C
73 #define	ADC_TC_CHARGE_DELAY		0x060
75 #define	ADC_STEPCFG(n)		(0x064 + (8*((n)-1)))
76 #define	ADC_STEPDLY(n)		(0x068 + (8*((n)-1)))
79 #define	ADC_STEP_RFM_MSK		0x01800000
81 #define	ADC_STEP_RFM_VSSA		0
85 #define	ADC_STEP_INP_MSK		0x00780000
88 #define	ADC_STEP_INM_MSK		0x00078000
92 #define	ADC_STEP_RFP_MSK		0x00007000
94 #define	ADC_STEP_RFP_VDDA		0
104 #define	ADC_STEP_AVG_MSK		0x0000001c
106 #define	ADC_STEP_MODE_MSK		0x00000003
107 #define	ADC_STEP_MODE_ONESHOT		0x00000000
108 #define	ADC_STEP_MODE_CONTINUOUS	0x00000001
109 #define	ADC_STEP_MODE_HW_ONESHOT	0x00000002
110 #define	ADC_STEP_MODE_HW_CONTINUOUS	0x00000003
111 #define	ADC_STEP_SAMPLE_DELAY		0xff000000
112 #define	ADC_STEP_OPEN_DELAY		0x0003ffff
113 #define	ADC_FIFO0COUNT		0x0e4
114 #define	ADC_FIFO0THRESHOLD	0x0e8
115 #define	ADC_FIFO1COUNT		0x0f0
116 #define	ADC_FIFO1THRESHOLD	0x0f4
117 #define	ADC_FIFO0DATA		0x100
118 #define	ADC_FIFO1DATA		0x200
119 #define	ADC_FIFO_COUNT_MSK		0x0000007f
120 #define	ADC_FIFO_STEP_ID_MSK		0x000f0000
122 #define	ADC_FIFO_DATA_MSK		0x00000fff
123 #define	ADC_MAX_VALUE		0xfff