Lines Matching full:clksel
509 uint32_t clksel; in omap4_clk_generic_activate() local
528 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_activate()
529 clksel &= ~CLKCTRL_MODULEMODE_MASK; in omap4_clk_generic_activate()
530 clksel |= clk_details->enable_mode; in omap4_clk_generic_activate()
531 bus_write_4(clk_mem_res, clk_details->clksel_reg, clksel); in omap4_clk_generic_activate()
539 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_activate()
540 if ((clksel & CLKCTRL_IDLEST_MASK) == CLKCTRL_IDLEST_ENABLED) in omap4_clk_generic_activate()
546 if ((clksel & CLKCTRL_IDLEST_MASK) != CLKCTRL_IDLEST_ENABLED) { in omap4_clk_generic_activate()
548 printf("Error: 0x%08x => 0x%08x\n", clk_details->clksel_reg, clksel); in omap4_clk_generic_activate()
575 uint32_t clksel; in omap4_clk_generic_deactivate() local
594 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_deactivate()
595 clksel &= ~CLKCTRL_MODULEMODE_MASK; in omap4_clk_generic_deactivate()
596 clksel |= CLKCTRL_MODULEMODE_DISABLE; in omap4_clk_generic_deactivate()
597 bus_write_4(clk_mem_res, clk_details->clksel_reg, clksel); in omap4_clk_generic_deactivate()
644 uint32_t clksel; in omap4_clk_generic_accessible() local
660 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_accessible()
663 if ((clksel & CLKCTRL_IDLEST_MASK) != CLKCTRL_IDLEST_ENABLED) in omap4_clk_generic_accessible()
763 uint32_t clksel; in omap4_clk_gptimer_get_source_freq() local
780 /* Need to read the CLKSEL field to determine the clock source */ in omap4_clk_gptimer_get_source_freq()
781 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_gptimer_get_source_freq()
782 if (clksel & (0x1UL << 24)) in omap4_clk_gptimer_get_source_freq()
813 uint32_t clksel; in omap4_clk_hsmmc_set_source() local
837 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_hsmmc_set_source()
841 clksel &= ~(0x1UL << 24); in omap4_clk_hsmmc_set_source()
843 clksel |= (0x1UL << 24); in omap4_clk_hsmmc_set_source()
847 bus_write_4(clk_mem_res, clk_details->clksel_reg, clksel); in omap4_clk_hsmmc_set_source()
872 uint32_t clksel; in omap4_clk_hsmmc_get_source_freq() local
892 /* Need to read the CLKSEL field to determine the clock source */ in omap4_clk_hsmmc_get_source_freq()
893 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_hsmmc_get_source_freq()
894 if (clksel & (0x1UL << 24)) in omap4_clk_hsmmc_get_source_freq()
929 uint32_t clksel; in omap4_clk_get_sysclk_freq() local
938 clksel = bus_read_4(sc->sc_res, CM_SYS_CLKSEL_OFFSET); in omap4_clk_get_sysclk_freq()
939 switch (clksel & 0x7) { in omap4_clk_get_sysclk_freq()
987 uint32_t clksel; in omap4_clk_get_arm_fclk_freq() local
996 /* Read the clksel register which contains the DPLL multiple and divide in omap4_clk_get_arm_fclk_freq()
999 clksel = bus_read_4(sc->sc_res, CM_CLKSEL_DPLL_MPU); in omap4_clk_get_arm_fclk_freq()
1001 pll_mult = ((clksel >> 8) & 0x7ff); in omap4_clk_get_arm_fclk_freq()
1002 pll_div = (clksel & 0x7f) + 1; in omap4_clk_get_arm_fclk_freq()
1071 uint32_t clksel; in omap4_clk_hsusbhost_activate() local
1093 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_activate()
1094 clksel &= ~CLKCTRL_MODULEMODE_MASK; in omap4_clk_hsusbhost_activate()
1095 clksel |= CLKCTRL_MODULEMODE_ENABLE; in omap4_clk_hsusbhost_activate()
1097 clksel |= (0x1 << 8); /* USB-HOST optional clock: USB_CH0_CLK */ in omap4_clk_hsusbhost_activate()
1098 clksel |= (0x1 << 9); /* USB-HOST optional clock: USB_CH1_CLK */ in omap4_clk_hsusbhost_activate()
1124 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_activate()
1127 clksel &= ~CLKCTRL_MODULEMODE_MASK; in omap4_clk_hsusbhost_activate()
1128 clksel |= /*CLKCTRL_MODULEMODE_ENABLE*/2; in omap4_clk_hsusbhost_activate()
1130 clksel |= (0x1 << 15); /* USB-HOST clock control: FUNC48MCLK */ in omap4_clk_hsusbhost_activate()
1134 clksel |= (0x1 << 8); /* UTMI_P1_CLK */ in omap4_clk_hsusbhost_activate()
1136 clksel |= (0x1 << 9); /* UTMI_P2_CLK */ in omap4_clk_hsusbhost_activate()
1139 clksel |= (0x5 << 11); /* HSIC60M_P1_CLK + HSIC480M_P1_CLK */ in omap4_clk_hsusbhost_activate()
1141 clksel |= (0x5 << 12); /* HSIC60M_P2_CLK + HSIC480M_P2_CLK */ in omap4_clk_hsusbhost_activate()
1149 bus_write_4(clk_mem_res, clksel_reg_off, clksel); in omap4_clk_hsusbhost_activate()
1153 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_activate()
1154 if ((clksel & CLKCTRL_IDLEST_MASK) == CLKCTRL_IDLEST_ENABLED) in omap4_clk_hsusbhost_activate()
1159 if ((clksel & CLKCTRL_IDLEST_MASK) != CLKCTRL_IDLEST_ENABLED) { in omap4_clk_hsusbhost_activate()
1161 printf("Error: 0x%08x => 0x%08x\n", clksel_reg_off, clksel); in omap4_clk_hsusbhost_activate()
1187 uint32_t clksel; in omap4_clk_hsusbhost_deactivate() local
1199 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_deactivate()
1200 clksel &= ~CLKCTRL_MODULEMODE_MASK; in omap4_clk_hsusbhost_deactivate()
1201 clksel |= CLKCTRL_MODULEMODE_DISABLE; in omap4_clk_hsusbhost_deactivate()
1227 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_deactivate()
1231 clksel &= ~CLKCTRL_MODULEMODE_MASK; in omap4_clk_hsusbhost_deactivate()
1232 clksel |= CLKCTRL_MODULEMODE_DISABLE; in omap4_clk_hsusbhost_deactivate()
1234 clksel &= ~(0x1 << 15); /* USB-HOST clock control: FUNC48MCLK */ in omap4_clk_hsusbhost_deactivate()
1238 clksel &= ~(0x1 << 8); /* UTMI_P1_CLK */ in omap4_clk_hsusbhost_deactivate()
1240 clksel &= ~(0x1 << 9); /* UTMI_P2_CLK */ in omap4_clk_hsusbhost_deactivate()
1243 clksel &= ~(0x5 << 11); /* HSIC60M_P1_CLK + HSIC480M_P1_CLK */ in omap4_clk_hsusbhost_deactivate()
1245 clksel &= ~(0x5 << 12); /* HSIC60M_P2_CLK + HSIC480M_P2_CLK */ in omap4_clk_hsusbhost_deactivate()
1253 bus_write_4(clk_mem_res, clksel_reg_off, clksel); in omap4_clk_hsusbhost_deactivate()
1278 uint32_t clksel; in omap4_clk_hsusbhost_accessible() local
1298 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_accessible()
1301 if ((clksel & CLKCTRL_IDLEST_MASK) != CLKCTRL_IDLEST_ENABLED) in omap4_clk_hsusbhost_accessible()
1328 uint32_t clksel; in omap4_clk_hsusbhost_set_source() local
1345 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_set_source()
1349 clksel |= (0x1 << bit); in omap4_clk_hsusbhost_set_source()
1351 clksel &= ~(0x1 << bit); in omap4_clk_hsusbhost_set_source()
1353 bus_write_4(clk_mem_res, clksel_reg_off, clksel); in omap4_clk_hsusbhost_set_source()