Lines Matching refs:DMTIMER_WRITE4
89 #define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->tmr_mem_res, (reg), (val)) macro
113 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); in am335x_dmtimer_et_start()
114 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); in am335x_dmtimer_et_start()
132 DMTIMER_WRITE4(sc, DMT_TLDR, 0xFFFFFFFF - reload_count); in am335x_dmtimer_et_start()
133 DMTIMER_WRITE4(sc, DMT_TCRR, 0xFFFFFFFF - initial_count); in am335x_dmtimer_et_start()
136 DMTIMER_WRITE4(sc, DMT_IRQENABLE_SET, DMT_IRQ_OVF); in am335x_dmtimer_et_start()
138 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); in am335x_dmtimer_et_start()
152 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); in am335x_dmtimer_et_stop()
153 DMTIMER_WRITE4(sc, DMT_IRQENABLE_CLR, DMT_IRQ_OVF); in am335x_dmtimer_et_stop()
154 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); in am335x_dmtimer_et_stop()
166 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); in am335x_dmtimer_et_intr()
224 DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET); in am335x_dmtimer_tc_init()
229 DMTIMER_WRITE4(sc, DMT_TLDR, 0); in am335x_dmtimer_tc_init()
230 DMTIMER_WRITE4(sc, DMT_TCRR, 0); in am335x_dmtimer_tc_init()
231 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); in am335x_dmtimer_tc_init()