Lines Matching +full:power +full:- +full:up

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
69  * and shared L2 cache power-on.
83 	 * We don't need to power up CPU 0!  This will power it  in qcom_cpu_kpssv2_regulator_start()
90 	 * Walk the qcom,acc and next-level-cache entries to find their  in qcom_cpu_kpssv2_regulator_start()
95 	 * The next-level-cache actually is a phandle through to a qcom,saw  in qcom_cpu_kpssv2_regulator_start()
104 	sret = OF_getencprop(node, "next-level-cache", (void *) &l2_phandle,  in qcom_cpu_kpssv2_regulator_start()
107 		panic("***couldn't get phandle for next-level-cache");  in qcom_cpu_kpssv2_regulator_start()
125 		panic("*** couldn't map next-level-cache -> "  in qcom_cpu_kpssv2_regulator_start()
129 	 * Power sequencing to ensure the cores are off, then power them on  in qcom_cpu_kpssv2_regulator_start()
146 	 * Start up BHS segments.  in qcom_cpu_kpssv2_regulator_start()
155 	 * Switch on the LDO bypass; BHS will now supply power.  in qcom_cpu_kpssv2_regulator_start()
178 	 * Remove power-down clamp.  in qcom_cpu_kpssv2_regulator_start()
186 	 * Clear core power reset.  in qcom_cpu_kpssv2_regulator_start()
193 	 * The power is ready, the core is out of reset, signal the core  in qcom_cpu_kpssv2_regulator_start()
194 	 * to power up.  in qcom_cpu_kpssv2_regulator_start()