Lines Matching refs:val
309 #define WR4(sc, offs, val) \ argument
310 bus_write_4(sc->mem_res, offs, val)
313 reg_wait(struct usbphy_softc *sc, uint32_t reg, uint32_t mask, uint32_t val) in reg_wait() argument
318 if ((RD4(sc, reg) & mask) == val) in reg_wait()
328 uint32_t val; in usbphy_utmi_phy_clk() local
331 val = RD4(sc, CTRL_USB_HOSTPC1_DEVLC); in usbphy_utmi_phy_clk()
333 val &= ~USB_HOSTPC1_DEVLC_PHCD; in usbphy_utmi_phy_clk()
335 val |= USB_HOSTPC1_DEVLC_PHCD; in usbphy_utmi_phy_clk()
336 WR4(sc, CTRL_USB_HOSTPC1_DEVLC, val); in usbphy_utmi_phy_clk()
351 uint32_t val; in usbphy_utmi_enable() local
354 val = RD4(sc, IF_USB_SUSP_CTRL); in usbphy_utmi_enable()
355 val |= UTMIP_RESET; in usbphy_utmi_enable()
356 WR4(sc, IF_USB_SUSP_CTRL, val); in usbphy_utmi_enable()
358 val = RD4(sc, UTMIP_TX_CFG0); in usbphy_utmi_enable()
359 val |= UTMIP_FS_PREAMBLE_J; in usbphy_utmi_enable()
360 WR4(sc, UTMIP_TX_CFG0, val); in usbphy_utmi_enable()
362 val = RD4(sc, UTMIP_HSRX_CFG0); in usbphy_utmi_enable()
363 val &= ~UTMIP_IDLE_WAIT(~0); in usbphy_utmi_enable()
364 val &= ~UTMIP_ELASTIC_LIMIT(~0); in usbphy_utmi_enable()
365 val |= UTMIP_IDLE_WAIT(sc->idle_wait_delay); in usbphy_utmi_enable()
366 val |= UTMIP_ELASTIC_LIMIT(sc->elastic_limit); in usbphy_utmi_enable()
367 WR4(sc, UTMIP_HSRX_CFG0, val); in usbphy_utmi_enable()
369 val = RD4(sc, UTMIP_HSRX_CFG1); in usbphy_utmi_enable()
370 val &= ~UTMIP_HS_SYNC_START_DLY(~0); in usbphy_utmi_enable()
371 val |= UTMIP_HS_SYNC_START_DLY(sc->hssync_start_delay); in usbphy_utmi_enable()
372 WR4(sc, UTMIP_HSRX_CFG1, val); in usbphy_utmi_enable()
374 val = RD4(sc, UTMIP_DEBOUNCE_CFG0); in usbphy_utmi_enable()
375 val &= ~UTMIP_BIAS_DEBOUNCE_A(~0); in usbphy_utmi_enable()
376 val |= UTMIP_BIAS_DEBOUNCE_A(0x7530); /* For 12MHz */ in usbphy_utmi_enable()
377 WR4(sc, UTMIP_DEBOUNCE_CFG0, val); in usbphy_utmi_enable()
379 val = RD4(sc, UTMIP_MISC_CFG0); in usbphy_utmi_enable()
380 val &= ~UTMIP_SUSPEND_EXIT_ON_EDGE; in usbphy_utmi_enable()
381 WR4(sc, UTMIP_MISC_CFG0, val); in usbphy_utmi_enable()
384 val = RD4(sc,IF_USB_SUSP_CTRL); in usbphy_utmi_enable()
385 val &= ~USB_WAKE_ON_CNNT_EN_DEV; in usbphy_utmi_enable()
386 val &= ~USB_WAKE_ON_DISCON_EN_DEV; in usbphy_utmi_enable()
387 WR4(sc, IF_USB_SUSP_CTRL, val); in usbphy_utmi_enable()
389 val = RD4(sc, UTMIP_BAT_CHRG_CFG0); in usbphy_utmi_enable()
390 val &= ~UTMIP_PD_CHRG; in usbphy_utmi_enable()
391 WR4(sc, UTMIP_BAT_CHRG_CFG0, val); in usbphy_utmi_enable()
393 val = RD4(sc, UTMIP_BAT_CHRG_CFG0); in usbphy_utmi_enable()
394 val |= UTMIP_PD_CHRG; in usbphy_utmi_enable()
395 WR4(sc, UTMIP_BAT_CHRG_CFG0, val); in usbphy_utmi_enable()
413 val = bus_read_4(sc->pads_res, UTMIP_BIAS_CFG0); in usbphy_utmi_enable()
414 val &= ~UTMIP_OTGPD; in usbphy_utmi_enable()
415 val &= ~UTMIP_BIASPD; in usbphy_utmi_enable()
416 val &= ~UTMIP_HSSQUELCH_LEVEL(~0); in usbphy_utmi_enable()
417 val &= ~UTMIP_HSDISCON_LEVEL(~0); in usbphy_utmi_enable()
418 val &= ~UTMIP_HSDISCON_LEVEL_MSB(~0); in usbphy_utmi_enable()
419 val |= UTMIP_HSSQUELCH_LEVEL(sc->hssquelch_level); in usbphy_utmi_enable()
420 val |= UTMIP_HSDISCON_LEVEL(sc->hsdiscon_level); in usbphy_utmi_enable()
421 val |= UTMIP_HSDISCON_LEVEL_MSB(sc->hsdiscon_level); in usbphy_utmi_enable()
422 bus_write_4(sc->pads_res, UTMIP_BIAS_CFG0, val); in usbphy_utmi_enable()
432 val = RD4(sc, UTMIP_XCVR_CFG0); in usbphy_utmi_enable()
433 val &= ~UTMIP_FORCE_PD_POWERDOWN; in usbphy_utmi_enable()
434 val &= ~UTMIP_FORCE_PD2_POWERDOWN ; in usbphy_utmi_enable()
435 val &= ~UTMIP_FORCE_PDZI_POWERDOWN; in usbphy_utmi_enable()
436 val &= ~UTMIP_XCVR_LSBIAS_SEL; in usbphy_utmi_enable()
437 val &= ~UTMIP_XCVR_LSFSLEW(~0); in usbphy_utmi_enable()
438 val &= ~UTMIP_XCVR_LSRSLEW(~0); in usbphy_utmi_enable()
439 val &= ~UTMIP_XCVR_HSSLEW(~0); in usbphy_utmi_enable()
440 val &= ~UTMIP_XCVR_HSSLEW_MSB(~0); in usbphy_utmi_enable()
441 val |= UTMIP_XCVR_LSFSLEW(sc->xcvr_lsfslew); in usbphy_utmi_enable()
442 val |= UTMIP_XCVR_LSRSLEW(sc->xcvr_lsrslew); in usbphy_utmi_enable()
443 val |= UTMIP_XCVR_HSSLEW(sc->xcvr_hsslew); in usbphy_utmi_enable()
444 val |= UTMIP_XCVR_HSSLEW_MSB(sc->xcvr_hsslew); in usbphy_utmi_enable()
446 val &= ~UTMIP_XCVR_SETUP(~0); in usbphy_utmi_enable()
447 val &= ~UTMIP_XCVR_SETUP_MSB(~0); in usbphy_utmi_enable()
448 val |= UTMIP_XCVR_SETUP(sc->xcvr_setup); in usbphy_utmi_enable()
449 val |= UTMIP_XCVR_SETUP_MSB(sc->xcvr_setup); in usbphy_utmi_enable()
451 WR4(sc, UTMIP_XCVR_CFG0, val); in usbphy_utmi_enable()
453 val = RD4(sc, UTMIP_XCVR_CFG1); in usbphy_utmi_enable()
454 val &= ~UTMIP_FORCE_PDDISC_POWERDOWN; in usbphy_utmi_enable()
455 val &= ~UTMIP_FORCE_PDCHRP_POWERDOWN; in usbphy_utmi_enable()
456 val &= ~UTMIP_FORCE_PDDR_POWERDOWN; in usbphy_utmi_enable()
457 val &= ~UTMIP_XCVR_TERM_RANGE_ADJ(~0); in usbphy_utmi_enable()
458 val |= UTMIP_XCVR_TERM_RANGE_ADJ(sc->term_range_adj); in usbphy_utmi_enable()
459 WR4(sc, UTMIP_XCVR_CFG1, val); in usbphy_utmi_enable()
461 val = RD4(sc, UTMIP_BIAS_CFG1); in usbphy_utmi_enable()
462 val &= ~UTMIP_BIAS_PDTRK_COUNT(~0); in usbphy_utmi_enable()
463 val |= UTMIP_BIAS_PDTRK_COUNT(0x5); in usbphy_utmi_enable()
464 WR4(sc, UTMIP_BIAS_CFG1, val); in usbphy_utmi_enable()
466 val = RD4(sc, UTMIP_SPARE_CFG0); in usbphy_utmi_enable()
468 val |= FUSE_SETUP_SEL; in usbphy_utmi_enable()
470 val &= ~FUSE_SETUP_SEL; in usbphy_utmi_enable()
471 WR4(sc, UTMIP_SPARE_CFG0, val); in usbphy_utmi_enable()
473 val = RD4(sc, IF_USB_SUSP_CTRL); in usbphy_utmi_enable()
474 val |= UTMIP_PHY_ENB; in usbphy_utmi_enable()
475 WR4(sc, IF_USB_SUSP_CTRL, val); in usbphy_utmi_enable()
477 val = RD4(sc, IF_USB_SUSP_CTRL); in usbphy_utmi_enable()
478 val &= ~UTMIP_RESET; in usbphy_utmi_enable()
479 WR4(sc, IF_USB_SUSP_CTRL, val); in usbphy_utmi_enable()
483 val = RD4(sc, CTRL_USB_USBMODE); in usbphy_utmi_enable()
484 val &= ~USB_USBMODE_MASK; in usbphy_utmi_enable()
486 val |= USB_USBMODE_HOST; in usbphy_utmi_enable()
488 val |= USB_USBMODE_DEVICE; in usbphy_utmi_enable()
489 WR4(sc, CTRL_USB_USBMODE, val); in usbphy_utmi_enable()
491 val = RD4(sc, CTRL_USB_HOSTPC1_DEVLC); in usbphy_utmi_enable()
492 val &= ~USB_HOSTPC1_DEVLC_PTS(~0); in usbphy_utmi_enable()
493 val |= USB_HOSTPC1_DEVLC_PTS(0); in usbphy_utmi_enable()
494 WR4(sc, CTRL_USB_HOSTPC1_DEVLC, val); in usbphy_utmi_enable()
503 uint32_t val; in usbphy_utmi_disable() local
508 val = RD4(sc, IF_USB_SUSP_CTRL); in usbphy_utmi_disable()
509 val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0); in usbphy_utmi_disable()
510 val |= USB_WAKE_ON_CNNT_EN_DEV; in usbphy_utmi_disable()
511 val |= USB_WAKEUP_DEBOUNCE_COUNT(5); in usbphy_utmi_disable()
512 WR4(sc, IF_USB_SUSP_CTRL, val); in usbphy_utmi_disable()
515 val = RD4(sc, IF_USB_SUSP_CTRL); in usbphy_utmi_disable()
516 val |= UTMIP_RESET; in usbphy_utmi_disable()
517 WR4(sc, IF_USB_SUSP_CTRL, val); in usbphy_utmi_disable()
519 val = RD4(sc, UTMIP_BAT_CHRG_CFG0); in usbphy_utmi_disable()
520 val |= UTMIP_PD_CHRG; in usbphy_utmi_disable()
521 WR4(sc, UTMIP_BAT_CHRG_CFG0, val); in usbphy_utmi_disable()
523 val = RD4(sc, UTMIP_XCVR_CFG0); in usbphy_utmi_disable()
524 val |= UTMIP_FORCE_PD_POWERDOWN; in usbphy_utmi_disable()
525 val |= UTMIP_FORCE_PD2_POWERDOWN; in usbphy_utmi_disable()
526 val |= UTMIP_FORCE_PDZI_POWERDOWN; in usbphy_utmi_disable()
527 WR4(sc, UTMIP_XCVR_CFG0, val); in usbphy_utmi_disable()
529 val = RD4(sc, UTMIP_XCVR_CFG1); in usbphy_utmi_disable()
530 val |= UTMIP_FORCE_PDDISC_POWERDOWN; in usbphy_utmi_disable()
531 val |= UTMIP_FORCE_PDCHRP_POWERDOWN; in usbphy_utmi_disable()
532 val |= UTMIP_FORCE_PDDR_POWERDOWN; in usbphy_utmi_disable()
533 WR4(sc, UTMIP_XCVR_CFG1, val); in usbphy_utmi_disable()
543 val =bus_read_4(sc->pads_res, UTMIP_BIAS_CFG0); in usbphy_utmi_disable()
544 val |= UTMIP_OTGPD; in usbphy_utmi_disable()
545 val |= UTMIP_BIASPD; in usbphy_utmi_disable()
546 bus_write_4(sc->pads_res, UTMIP_BIAS_CFG0, val); in usbphy_utmi_disable()