Lines Matching +full:0 +full:x1e8

66 #define	SDMMC_VENDOR_CLOCK_CNTRL		0x100
68 #define VENDOR_CLOCK_CNTRL_CLK_MASK 0xFF
69 #define SDMMC_VENDOR_SYS_SW_CNTRL 0x104
70 #define SDMMC_VENDOR_CAP_OVERRIDES 0x10C
71 #define SDMMC_VENDOR_BOOT_CNTRL 0x110
72 #define SDMMC_VENDOR_BOOT_ACK_TIMEOUT 0x114
73 #define SDMMC_VENDOR_BOOT_DAT_TIMEOUT 0x118
74 #define SDMMC_VENDOR_DEBOUNCE_COUNT 0x11C
75 #define SDMMC_VENDOR_MISC_CNTRL 0x120
76 #define VENDOR_MISC_CTRL_ENABLE_SDR104 0x8
77 #define VENDOR_MISC_CTRL_ENABLE_SDR50 0x10
78 #define VENDOR_MISC_CTRL_ENABLE_SDHCI_SPEC_300 0x20
79 #define VENDOR_MISC_CTRL_ENABLE_DDR50 0x200
80 #define SDMMC_MAX_CURRENT_OVERRIDE 0x124
81 #define SDMMC_MAX_CURRENT_OVERRIDE_HI 0x128
82 #define SDMMC_VENDOR_CLK_GATE_HYSTERESIS_COUNT 0x1D0
83 #define SDMMC_VENDOR_PHWRESET_VAL0 0x1D4
84 #define SDMMC_VENDOR_PHWRESET_VAL1 0x1D8
85 #define SDMMC_VENDOR_PHWRESET_VAL2 0x1DC
86 #define SDMMC_SDMEMCOMPPADCTRL_0 0x1E0
87 #define SDMMC_AUTO_CAL_CONFIG 0x1E4
88 #define SDMMC_AUTO_CAL_INTERVAL 0x1E8
89 #define SDMMC_AUTO_CAL_STATUS 0x1EC
90 #define SDMMC_SDMMC_MCCIF_FIFOCTRL 0x1F4
91 #define SDMMC_TIMEOUT_WCOAL_SDMMC 0x1F8
97 {NULL, 0},
245 if (cd->ocd_data == 0) in tegra_sdhci_probe()
252 if ((OF_getencprop(node, "quirks", &cid, sizeof(cid))) > 0) in tegra_sdhci_probe()
254 if ((OF_getencprop(node, "max-frequency", &cid, sizeof(cid))) > 0) in tegra_sdhci_probe()
272 rid = 0; in tegra_sdhci_attach()
281 rid = 0; in tegra_sdhci_attach()
290 rv = hwreset_get_by_ofw_name(sc->dev, 0, "sdhci", &sc->reset); in tegra_sdhci_attach()
291 if (rv != 0) { in tegra_sdhci_attach()
296 if (rv != 0) { in tegra_sdhci_attach()
306 if (rv != 0) { in tegra_sdhci_attach()
312 rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk); in tegra_sdhci_attach()
313 if (rv != 0) { in tegra_sdhci_attach()
318 if (rv != 0) { in tegra_sdhci_attach()
323 if (rv != 0) { in tegra_sdhci_attach()
327 if (rv != 0) { in tegra_sdhci_attach()
333 if (rv != 0) { in tegra_sdhci_attach()
348 if (OF_getencprop(node, "bus-width", &prop, sizeof(prop)) > 0) { in tegra_sdhci_attach()
382 rv = sdhci_init_slot(dev, &sc->slot, 0); in tegra_sdhci_attach()
383 if (rv != 0) { in tegra_sdhci_attach()
394 return (0); in tegra_sdhci_attach()
408 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res); in tegra_sdhci_attach()
410 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res); in tegra_sdhci_attach()
423 if (error != 0) in tegra_sdhci_detach()
436 return (0); in tegra_sdhci_detach()