Lines Matching +full:- +full:grp

1 /*-
78 {"nvidia,tegra124-pinmux", 1},
109 {"nvidia,enable-input", PROP_ID_ENABLE_INPUT},
110 {"nvidia,open-drain", PROP_ID_OPEN_DRAIN},
112 {"nvidia,io-reset", PROP_ID_IORESET},
113 {"nvidia,rcv-sel", PROP_ID_RCV_SEL},
114 {"nvidia,high-speed-mode", PROP_ID_HIGH_SPEED_MODE},
116 {"nvidia,low-power-mode", PROP_ID_LOW_POWER_MODE},
117 {"nvidia,pull-down-strength", PROP_ID_DRIVE_DOWN_STRENGTH},
118 {"nvidia,pull-up-strength", PROP_ID_DRIVE_UP_STRENGTH},
119 {"nvidia,slew-rate-falling", PROP_ID_SLEW_RATE_FALLING},
120 {"nvidia,slew-rate-rising", PROP_ID_SLEW_RATE_RISING},
121 {"nvidia,drive-type", PROP_ID_DRIVE_TYPE},
184 .gpio_num = -1, \
391 #define GRP(r, nm, dn_s, dn_w, up_s, up_w) \ macro
394 .reg = r - 0x868, \
396 .drvdn_mask = (1 << dn_w) - 1, \
398 .drvup_mask = (1 << dn_w) - 1, \
403 GRP(0x868, ao1, 12, 5, 20, 5),
404 GRP(0x86C, ao2, 12, 5, 20, 5),
405 GRP(0x870, at1, 12, 7, 20, 7),
406 GRP(0x874, at2, 12, 7, 20, 7),
407 GRP(0x878, at3, 12, 7, 20, 7),
408 GRP(0x87C, at4, 12, 7, 20, 7),
409 GRP(0x880, at5, 14, 5, 19, 5),
410 GRP(0x884, cdev1, 12, 5, 20, 5),
411 GRP(0x888, cdev2, 12, 5, 20, 5),
412 GRP(0x890, dap1, 12, 5, 20, 5),
413 GRP(0x894, dap2, 12, 5, 20, 5),
414 GRP(0x898, dap3, 12, 5, 20, 5),
415 GRP(0x89C, dap4, 12, 5, 20, 5),
416 GRP(0x8A0, dbg, 12, 5, 20, 5),
417 GRP(0x8B0, sdio3, 12, 7, 20, 7),
418 GRP(0x8B4, spi, 12, 5, 20, 5),
419 GRP(0x8B8, uaa, 12, 5, 20, 5),
420 GRP(0x8BC, uab, 12, 5, 20, 5),
421 GRP(0x8C0, uart2, 12, 5, 20, 5),
422 GRP(0x8C4, uart3, 12, 5, 20, 5),
423 GRP(0x8EC, sdio1, 12, 7, 20, 7),
424 GRP(0x8FC, ddc, 12, 5, 20, 5),
425 GRP(0x900, gma, 14, 5, 20, 5),
426 GRP(0x910, gme, 14, 5, 19, 5),
427 GRP(0x914, gmf, 14, 5, 19, 5),
428 GRP(0x918, gmg, 14, 5, 19, 5),
429 GRP(0x91C, gmh, 14, 5, 19, 5),
430 GRP(0x920, owr, 12, 5, 20, 5),
431 GRP(0x924, uda, 12, 5, 20, 5),
432 GRP(0x928, gpv, 12, 5, 20, 5),
433 GRP(0x92C, dev3, 12, 5, 20, 5),
434 GRP(0x938, cec, 12, 5, 20, 5),
435 GRP(0x994, at6, 12, 7, 20, 7),
436 GRP(0x998, dap5, 12, 5, 20, 5),
437 GRP(0x99C, usb_vbus_en, 12, 5, 20, 5),
438 GRP(0x9A8, ao3, 12, 5, -1, 0),
439 GRP(0x9B0, ao0, 12, 5, 20, 5),
440 GRP(0x9B4, hv0, 12, 5, -1, 0),
441 GRP(0x9C4, sdio4, 12, 5, 20, 5),
442 GRP(0x9C8, ao4, 12, 7, 20, 7),
475 if (strcmp(fnc_name, mux->functions[i]) == 0) in pinmux_mux_function()
478 return (-1); in pinmux_mux_function()
488 reg = bus_read_4(sc->mux_mem_res, mux->reg); in pinmux_config_mux()
490 if (cfg->function != NULL) { in pinmux_config_mux()
491 tmp = pinmux_mux_function(mux, cfg->function); in pinmux_config_mux()
492 if (tmp == -1) { in pinmux_config_mux()
493 device_printf(sc->dev, in pinmux_config_mux()
494 "Unknown function %s for pin %s\n", cfg->function, in pinmux_config_mux()
502 if (cfg->params[PROP_ID_PULL] != -1) { in pinmux_config_mux()
504 reg |= (cfg->params[PROP_ID_PULL] & TEGRA_MUX_PUPD_MASK) << in pinmux_config_mux()
507 if (cfg->params[PROP_ID_TRISTATE] != -1) { in pinmux_config_mux()
509 reg |= (cfg->params[PROP_ID_TRISTATE] & 1) << in pinmux_config_mux()
512 if (cfg->params[TEGRA_MUX_ENABLE_INPUT_SHIFT] != -1) { in pinmux_config_mux()
514 reg |= (cfg->params[TEGRA_MUX_ENABLE_INPUT_SHIFT] & 1) << in pinmux_config_mux()
517 if (cfg->params[PROP_ID_ENABLE_INPUT] != -1) { in pinmux_config_mux()
519 reg |= (cfg->params[PROP_ID_ENABLE_INPUT] & 1) << in pinmux_config_mux()
522 if (cfg->params[PROP_ID_ENABLE_INPUT] != -1) { in pinmux_config_mux()
524 reg |= (cfg->params[PROP_ID_OPEN_DRAIN] & 1) << in pinmux_config_mux()
527 if (cfg->params[PROP_ID_LOCK] != -1) { in pinmux_config_mux()
529 reg |= (cfg->params[PROP_ID_LOCK] & 1) << in pinmux_config_mux()
532 if (cfg->params[PROP_ID_IORESET] != -1) { in pinmux_config_mux()
534 reg |= (cfg->params[PROP_ID_IORESET] & 1) << in pinmux_config_mux()
537 if (cfg->params[PROP_ID_RCV_SEL] != -1) { in pinmux_config_mux()
539 reg |= (cfg->params[PROP_ID_RCV_SEL] & 1) << in pinmux_config_mux()
542 bus_write_4(sc->mux_mem_res, mux->reg, reg); in pinmux_config_mux()
548 const struct tegra_grp *grp, struct pincfg *cfg) in pinmux_config_grp() argument
552 reg = bus_read_4(sc->pad_mem_res, grp->reg); in pinmux_config_grp()
554 if (cfg->params[PROP_ID_HIGH_SPEED_MODE] != -1) { in pinmux_config_grp()
556 reg |= (cfg->params[PROP_ID_HIGH_SPEED_MODE] & 1) << in pinmux_config_grp()
559 if (cfg->params[PROP_ID_SCHMITT] != -1) { in pinmux_config_grp()
561 reg |= (cfg->params[PROP_ID_SCHMITT] & 1) << in pinmux_config_grp()
564 if (cfg->params[PROP_ID_DRIVE_TYPE] != -1) { in pinmux_config_grp()
566 reg |= (cfg->params[PROP_ID_DRIVE_TYPE] & in pinmux_config_grp()
569 if (cfg->params[PROP_ID_SLEW_RATE_RISING] != -1) { in pinmux_config_grp()
572 reg |= (cfg->params[PROP_ID_SLEW_RATE_RISING] & in pinmux_config_grp()
576 if (cfg->params[PROP_ID_SLEW_RATE_FALLING] != -1) { in pinmux_config_grp()
579 reg |= (cfg->params[PROP_ID_SLEW_RATE_FALLING] & in pinmux_config_grp()
583 if ((cfg->params[PROP_ID_DRIVE_DOWN_STRENGTH] != -1) && in pinmux_config_grp()
584 (grp->drvdn_mask != -1)) { in pinmux_config_grp()
585 reg &= ~(grp->drvdn_shift << grp->drvdn_mask); in pinmux_config_grp()
586 reg |= (cfg->params[PROP_ID_DRIVE_DOWN_STRENGTH] & in pinmux_config_grp()
587 grp->drvdn_mask) << grp->drvdn_shift; in pinmux_config_grp()
589 if ((cfg->params[PROP_ID_DRIVE_UP_STRENGTH] != -1) && in pinmux_config_grp()
590 (grp->drvup_mask != -1)) { in pinmux_config_grp()
591 reg &= ~(grp->drvup_shift << grp->drvup_mask); in pinmux_config_grp()
592 reg |= (cfg->params[PROP_ID_DRIVE_UP_STRENGTH] & in pinmux_config_grp()
593 grp->drvup_mask) << grp->drvup_shift; in pinmux_config_grp()
595 bus_write_4(sc->pad_mem_res, grp->reg, reg); in pinmux_config_grp()
603 const struct tegra_grp *grp; in pinmux_config_node() local
609 if (cfg->function == NULL) { in pinmux_config_node()
613 reg = bus_read_4(sc->mipi_mem_res, 0); /* register 0x820 */ in pinmux_config_node()
614 if (strcmp(cfg->function, "csi") == 0) in pinmux_config_node()
616 else if (strcmp(cfg->function, "dsi_b") == 0) in pinmux_config_node()
618 bus_write_4(sc->mipi_mem_res, 0, reg); /* register 0x820 */ in pinmux_config_node()
624 if (mux->gpio_num != -1) { in pinmux_config_node()
632 grp = pinmux_search_grp(pin_name); in pinmux_config_node()
633 if (grp != NULL) { in pinmux_config_node()
634 rv = pinmux_config_grp(sc, pin_name, grp, cfg); in pinmux_config_node()
638 device_printf(sc->dev, "Unknown pin: %s\n", pin_name); in pinmux_config_node()
654 (void **)&cfg->function); in pinmux_read_node()
656 cfg->function = NULL; in pinmux_read_node()
660 rv = OF_getencprop(node, prop_names[i].name, &cfg->params[i], in pinmux_read_node()
661 sizeof(cfg->params[i])); in pinmux_read_node()
663 cfg->params[i] = -1; in pinmux_read_node()
685 device_printf(sc->dev, in pinmux_process_node()
722 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) in pinmux_probe()
744 sc->dev = dev; in pinmux_attach()
747 sc->pad_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in pinmux_attach()
749 if (sc->pad_mem_res == NULL) { in pinmux_attach()
755 sc->mux_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in pinmux_attach()
757 if (sc->mux_mem_res == NULL) { in pinmux_attach()
763 sc->mipi_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in pinmux_attach()
765 if (sc->mipi_mem_res == NULL) { in pinmux_attach()