Lines Matching +full:pin +full:- +full:val
1 /*-
54 #define GPIO_LOCK(_sc) mtx_lock(&(_sc)->mtx)
55 #define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
56 #define GPIO_LOCK_INIT(_sc) mtx_init(&_sc->mtx, \
57 device_get_nameunit(_sc->dev), "tegra_gpio", MTX_DEF)
58 #define GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->mtx);
59 #define GPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->mtx, MA_OWNED);
60 #define GPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->mtx, MA_NOTOWNED);
62 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))
63 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
68 #define GPIO_PINS_IN_REG 8 /* Total pin in register */
77 #define NGPIO ((GPIO_NUM_BANKS * GPIO_REGS_IN_BANK * GPIO_PINS_IN_REG) - 8)
137 {"nvidia,tegra124-gpio", 1},
138 {"nvidia,tegra210-gpio", 1},
142 /* --------------------------------------------------------------------------
149 struct gpio_pin *pin, uint32_t val) in gpio_write_masked() argument
154 bit = GPIO_BIT(pin->gp_pin); in gpio_write_masked()
156 tmp |= (val & 1) << bit; /* value */ in gpio_write_masked()
157 bus_write_4(sc->mem_res, reg + GPIO_REGNUM(pin->gp_pin), tmp); in gpio_write_masked()
161 gpio_read(struct tegra_gpio_softc *sc, bus_size_t reg, struct gpio_pin *pin) in gpio_read() argument
164 uint32_t val; in gpio_read() local
166 bit = GPIO_BIT(pin->gp_pin); in gpio_read()
167 val = bus_read_4(sc->mem_res, reg + GPIO_REGNUM(pin->gp_pin)); in gpio_read()
168 return (val >> bit) & 1; in gpio_read()
172 tegra_gpio_pin_configure(struct tegra_gpio_softc *sc, struct gpio_pin *pin, in tegra_gpio_pin_configure() argument
180 pin->gp_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); in tegra_gpio_pin_configure()
182 pin->gp_flags |= GPIO_PIN_OUTPUT; in tegra_gpio_pin_configure()
183 gpio_write_masked(sc, GPIO_MSK_OE, pin, 1); in tegra_gpio_pin_configure()
185 pin->gp_flags |= GPIO_PIN_INPUT; in tegra_gpio_pin_configure()
186 gpio_write_masked(sc, GPIO_MSK_OE, pin, 0); in tegra_gpio_pin_configure()
196 return (sc->busdev); in tegra_gpio_get_bus()
203 *maxpin = NGPIO - 1; in tegra_gpio_pin_max()
208 tegra_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) in tegra_gpio_pin_getcaps() argument
213 if (pin >= sc->gpio_npins) in tegra_gpio_pin_getcaps()
217 *caps = sc->gpio_pins[pin].gp_caps; in tegra_gpio_pin_getcaps()
224 tegra_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) in tegra_gpio_pin_getflags() argument
230 if (pin >= sc->gpio_npins) in tegra_gpio_pin_getflags()
234 cnf = gpio_read(sc, GPIO_CNF, &sc->gpio_pins[pin]); in tegra_gpio_pin_getflags()
239 *flags = sc->gpio_pins[pin].gp_flags; in tegra_gpio_pin_getflags()
246 tegra_gpio_pin_getname(device_t dev, uint32_t pin, char *name) in tegra_gpio_pin_getname() argument
251 if (pin >= sc->gpio_npins) in tegra_gpio_pin_getname()
255 memcpy(name, sc->gpio_pins[pin].gp_name, GPIOMAXNAME); in tegra_gpio_pin_getname()
262 tegra_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) in tegra_gpio_pin_setflags() argument
268 if (pin >= sc->gpio_npins) in tegra_gpio_pin_setflags()
272 cnf = gpio_read(sc, GPIO_CNF, &sc->gpio_pins[pin]); in tegra_gpio_pin_setflags()
274 /* XXX - allow this for while .... in tegra_gpio_pin_setflags()
278 gpio_write_masked(sc, GPIO_MSK_CNF, &sc->gpio_pins[pin], 1); in tegra_gpio_pin_setflags()
280 tegra_gpio_pin_configure(sc, &sc->gpio_pins[pin], flags); in tegra_gpio_pin_setflags()
287 tegra_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) in tegra_gpio_pin_set() argument
292 if (pin >= sc->gpio_npins) in tegra_gpio_pin_set()
295 gpio_write_masked(sc, GPIO_MSK_OUT, &sc->gpio_pins[pin], value); in tegra_gpio_pin_set()
302 tegra_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) in tegra_gpio_pin_get() argument
307 if (pin >= sc->gpio_npins) in tegra_gpio_pin_get()
311 *val = gpio_read(sc, GPIO_IN, &sc->gpio_pins[pin]); in tegra_gpio_pin_get()
318 tegra_gpio_pin_toggle(device_t dev, uint32_t pin) in tegra_gpio_pin_toggle() argument
323 if (pin >= sc->gpio_npins) in tegra_gpio_pin_toggle()
327 gpio_write_masked(sc, GPIO_MSK_OE, &sc->gpio_pins[pin], in tegra_gpio_pin_toggle()
328 gpio_read(sc, GPIO_IN, &sc->gpio_pins[pin]) ^ 1); in tegra_gpio_pin_toggle()
334 /* --------------------------------------------------------------------------
341 struct tegra_gpio_irqsrc *tgi, uint32_t val) in intr_write_masked() argument
346 bit = GPIO_BIT(tgi->irq); in intr_write_masked()
348 tmp |= (val & 1) << bit; /* value */ in intr_write_masked()
349 bus_write_4(sc->mem_res, reg + GPIO_REGNUM(tgi->irq), tmp); in intr_write_masked()
354 struct tegra_gpio_irqsrc *tgi, uint32_t val, uint32_t mask) in intr_write_modify() argument
359 bit = GPIO_BIT(tgi->irq); in intr_write_modify()
361 tmp = bus_read_4(sc->mem_res, reg + GPIO_REGNUM(tgi->irq)); in intr_write_modify()
363 tmp |= val << bit; in intr_write_modify()
364 bus_write_4(sc->mem_res, reg + GPIO_REGNUM(tgi->irq), tmp); in intr_write_modify()
370 struct tegra_gpio_irqsrc *tgi, uint32_t val) in tegra_gpio_isrc_mask() argument
373 intr_write_masked(sc, GPIO_MSK_INT_ENB, tgi, val); in tegra_gpio_isrc_mask()
388 return (tgi->cfgreg & GPIO_INT_LVL_EDGE); in tegra_gpio_isrc_is_level()
394 u_int irq, i, j, val, basepin; in tegra_gpio_intr() local
401 sc = cookie->sc; in tegra_gpio_intr()
402 tf = curthread->td_intr_frame; in tegra_gpio_intr()
405 basepin = cookie->bank_num * GPIO_REGS_IN_BANK * in tegra_gpio_intr()
408 val = bus_read_4(sc->mem_res, GPIO_INT_STA + in tegra_gpio_intr()
410 val &= bus_read_4(sc->mem_res, GPIO_INT_ENB + in tegra_gpio_intr()
414 if ((val & (1 << j)) == 0) in tegra_gpio_intr()
417 tgi = &sc->isrcs[irq]; in tegra_gpio_intr()
420 if (intr_isrc_dispatch(&tgi->isrc, tf) != 0) { in tegra_gpio_intr()
424 device_printf(sc->dev, in tegra_gpio_intr()
440 sc->isrcs = malloc(sizeof(*sc->isrcs) * sc->gpio_npins, M_DEVBUF, in tegra_gpio_pic_attach()
443 name = device_get_nameunit(sc->dev); in tegra_gpio_pic_attach()
444 for (irq = 0; irq < sc->gpio_npins; irq++) { in tegra_gpio_pic_attach()
445 sc->isrcs[irq].irq = irq; in tegra_gpio_pic_attach()
446 sc->isrcs[irq].cfgreg = 0; in tegra_gpio_pic_attach()
447 error = intr_isrc_register(&sc->isrcs[irq].isrc, in tegra_gpio_pic_attach()
448 sc->dev, 0, "%s,%u", name, irq); in tegra_gpio_pic_attach()
452 if (intr_pic_register(sc->dev, in tegra_gpio_pic_attach()
453 OF_xref_from_node(ofw_bus_get_node(sc->dev))) == NULL) in tegra_gpio_pic_attach()
467 device_printf(sc->dev, "%s: not implemented yet\n", __func__); in tegra_gpio_pic_detach()
503 * 1 = low-to-high edge triggered. in tegra_gpio_pic_map_fdt()
504 * 2 = high-to-low edge triggered. in tegra_gpio_pic_map_fdt()
505 * 4 = active high level-sensitive. in tegra_gpio_pic_map_fdt()
506 * 8 = active low level-sensitive. in tegra_gpio_pic_map_fdt()
508 if (ncells != 2 || cells[0] >= sc->gpio_npins) in tegra_gpio_pic_map_fdt()
513 * At least, the combination of 'low-to-high' and 'high-to-low' edge in tegra_gpio_pic_map_fdt()
542 if (gpio_pin_num >= sc->gpio_npins) in tegra_gpio_pic_map_gpio()
580 if (data->type == INTR_MAP_DATA_FDT) { in tegra_gpio_pic_map_intr()
584 rv = tegra_gpio_pic_map_fdt(sc, daf->ncells, daf->cells, &irq, in tegra_gpio_pic_map_intr()
586 } else if (data->type == INTR_MAP_DATA_GPIO) { in tegra_gpio_pic_map_intr()
590 rv = tegra_gpio_pic_map_gpio(sc, dag->gpio_pin_num, in tegra_gpio_pic_map_intr()
591 dag->gpio_pin_flags, dag->gpio_intr_mode, &irq, NULL); in tegra_gpio_pic_map_intr()
596 *isrcp = &sc->isrcs[irq].isrc; in tegra_gpio_pic_map_intr()
654 if (data->type == INTR_MAP_DATA_FDT) { in tegra_gpio_pic_setup_intr()
658 rv = tegra_gpio_pic_map_fdt(sc, daf->ncells, daf->cells, &irq, in tegra_gpio_pic_setup_intr()
660 } else if (data->type == INTR_MAP_DATA_GPIO) { in tegra_gpio_pic_setup_intr()
664 rv = tegra_gpio_pic_map_gpio(sc, dag->gpio_pin_num, in tegra_gpio_pic_setup_intr()
665 dag->gpio_pin_flags, dag->gpio_intr_mode, &irq, &cfgreg); in tegra_gpio_pic_setup_intr()
675 if (isrc->isrc_handlers != 0) in tegra_gpio_pic_setup_intr()
676 return (tgi->cfgreg == cfgreg ? 0 : EINVAL); in tegra_gpio_pic_setup_intr()
678 tgi->cfgreg = cfgreg; in tegra_gpio_pic_setup_intr()
695 if (isrc->isrc_handlers == 0) in tegra_gpio_pic_teardown_intr()
706 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) { in tegra_gpio_probe()
714 /* --------------------------------------------------------------------------
727 KASSERT(mtx_initialized(&sc->mtx), ("gpio mutex not initialized")); in tegra_gpio_detach()
730 if (sc->irq_ih[i] != NULL) in tegra_gpio_detach()
731 bus_teardown_intr(dev, sc->irq_res[i], sc->irq_ih[i]); in tegra_gpio_detach()
734 if (sc->isrcs != NULL) in tegra_gpio_detach()
740 if (sc->irq_res[i] != NULL) in tegra_gpio_detach()
742 sc->irq_res[i]); in tegra_gpio_detach()
744 if (sc->mem_res != NULL) in tegra_gpio_detach()
745 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res); in tegra_gpio_detach()
758 sc->dev = dev; in tegra_gpio_attach()
763 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in tegra_gpio_attach()
765 if (sc->mem_res == NULL) { in tegra_gpio_attach()
771 sc->gpio_npins = NGPIO; in tegra_gpio_attach()
772 for (i = 0; i < sc->gpio_npins; i++) { in tegra_gpio_attach()
773 sc->gpio_pins[i].gp_pin = i; in tegra_gpio_attach()
774 sc->gpio_pins[i].gp_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | in tegra_gpio_attach()
778 snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME, "gpio_%s.%d", in tegra_gpio_attach()
781 sc->gpio_pins[i].gp_flags = in tegra_gpio_attach()
782 gpio_read(sc, GPIO_OE, &sc->gpio_pins[i]) != 0 ? in tegra_gpio_attach()
787 for (i = 0; i < sc->gpio_npins; i += GPIO_PINS_IN_REG) { in tegra_gpio_attach()
788 bus_write_4(sc->mem_res, GPIO_INT_ENB + GPIO_REGNUM(i), 0); in tegra_gpio_attach()
789 bus_write_4(sc->mem_res, GPIO_INT_STA + GPIO_REGNUM(i), 0xFF); in tegra_gpio_attach()
790 bus_write_4(sc->mem_res, GPIO_INT_CLR + GPIO_REGNUM(i), 0xFF); in tegra_gpio_attach()
795 sc->irq_cookies[i].sc = sc; in tegra_gpio_attach()
796 sc->irq_cookies[i].bank_num = i; in tegra_gpio_attach()
798 sc->irq_res[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ, in tegra_gpio_attach()
800 if (sc->irq_res[i] == NULL) { in tegra_gpio_attach()
805 if ((bus_setup_intr(dev, sc->irq_res[i], in tegra_gpio_attach()
807 &sc->irq_cookies[i], &sc->irq_ih[i]))) { in tegra_gpio_attach()
821 sc->busdev = gpiobus_attach_bus(dev); in tegra_gpio_attach()
822 if (sc->busdev == NULL) { in tegra_gpio_attach()
832 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) in tegra_map_gpios() argument
837 *pin = gpios[0]; in tegra_map_gpios()