Lines Matching refs:tegra_sku_info
63 struct tegra_sku_info tegra_sku_info; variable
75 struct tegra_sku_info *sku);
79 struct tegra_sku_info *sku);
85 struct tegra_sku_info *sku);
140 struct tegra_sku_info *sku, int *threshold) in tegra124_rev_sku_to_speedo_ids()
190 tegra124_init(struct tegra_efuse_softc *sc, struct tegra_sku_info *sku) in tegra124_init()
297 struct tegra_sku_info *sku, int speedo_rev, int *threshold) in tegra210_rev_sku_to_speedo_ids()
330 tegra210_init(struct tegra_efuse_softc *sc, struct tegra_sku_info *sku) in tegra210_init()
406 printf(" chip_id: %u\n", tegra_sku_info.chip_id); in tegra_efuse_dump_sku()
407 printf(" sku_id: %u\n", tegra_sku_info.sku_id); in tegra_efuse_dump_sku()
408 printf(" cpu_process_id: %u\n", tegra_sku_info.cpu_process_id); in tegra_efuse_dump_sku()
409 printf(" cpu_speedo_id: %u\n", tegra_sku_info.cpu_speedo_id); in tegra_efuse_dump_sku()
410 printf(" cpu_speedo_value: %u\n", tegra_sku_info.cpu_speedo_value); in tegra_efuse_dump_sku()
411 printf(" cpu_iddq_value: %u\n", tegra_sku_info.cpu_iddq_value); in tegra_efuse_dump_sku()
412 printf(" soc_process_id: %u\n", tegra_sku_info.soc_process_id); in tegra_efuse_dump_sku()
413 printf(" soc_speedo_id: %u\n", tegra_sku_info.soc_speedo_id); in tegra_efuse_dump_sku()
414 printf(" soc_speedo_value: %u\n", tegra_sku_info.soc_speedo_value); in tegra_efuse_dump_sku()
415 printf(" soc_iddq_value: %u\n", tegra_sku_info.soc_iddq_value); in tegra_efuse_dump_sku()
416 printf(" gpu_process_id: %u\n", tegra_sku_info.gpu_process_id); in tegra_efuse_dump_sku()
417 printf(" gpu_speedo_id: %u\n", tegra_sku_info.gpu_speedo_id); in tegra_efuse_dump_sku()
418 printf(" gpu_speedo_value: %u\n", tegra_sku_info.gpu_speedo_value); in tegra_efuse_dump_sku()
419 printf(" gpu_iddq_value: %u\n", tegra_sku_info.gpu_iddq_value); in tegra_efuse_dump_sku()
420 printf(" revision: %s\n", tegra_rev_name[tegra_sku_info.revision]); in tegra_efuse_dump_sku()
478 sc->soc->init(sc, &tegra_sku_info); in tegra_efuse_attach()