Lines Matching +full:watchdog +full:- +full:timers
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (C) 2007-2008 MARVELL INTERNATIONAL LTD.
43 #include <sys/watchdog.h>
62 #define MV_CLOCK_SRC_ARMV7 25000000 /* Timers' 25MHz mode */
92 { -1, 0 }
97 {"marvell,armada-380-timer", MV_NONE },
98 {"marvell,armada-xp-timer", MV_TMR | MV_WDT },
152 {"marvell,armada-xp-timer", (uintptr_t)&timer_armadaxp_config },
172 if (ofw_bus_search_compatible(dev, mv_timer_compat)->ocd_data == MV_NONE) in mv_timer_probe()
193 sc->config = (struct mv_timer_config*) in mv_timer_attach()
194 ofw_bus_search_compatible(dev, mv_timer_soc_config)->ocd_data; in mv_timer_attach()
196 if (sc->config->clock_src == 0) in mv_timer_attach()
197 sc->config->clock_src = get_tclk(); in mv_timer_attach()
199 error = bus_alloc_resources(dev, mv_timer_spec, sc->timer_res); in mv_timer_attach()
205 sc->timer_bst = rman_get_bustag(sc->timer_res[0]); in mv_timer_attach()
206 sc->timer_bsh = rman_get_bushandle(sc->timer_res[0]); in mv_timer_attach()
208 sc->has_wdt = ofw_bus_has_prop(dev, "mrvl,has-wdt"); in mv_timer_attach()
210 mtx_init(&timer_softc->timer_mtx, "watchdog", NULL, MTX_DEF); in mv_timer_attach()
212 if (sc->has_wdt) { in mv_timer_attach()
213 if (sc->config->watchdog_disable) in mv_timer_attach()
214 sc->config->watchdog_disable(); in mv_timer_attach()
218 if (ofw_bus_search_compatible(dev, mv_timer_compat)->ocd_data in mv_timer_attach()
220 /* Don't set timers for wdt-only entry. */ in mv_timer_attach()
221 device_printf(dev, "only watchdog attached\n"); in mv_timer_attach()
223 } else if (sc->timer_res[1] == NULL) { in mv_timer_attach()
225 bus_release_resources(dev, mv_timer_spec, sc->timer_res); in mv_timer_attach()
229 if (bus_setup_intr(dev, sc->timer_res[1], INTR_TYPE_CLK, in mv_timer_attach()
231 bus_release_resources(dev, mv_timer_spec, sc->timer_res); in mv_timer_attach()
237 if (sc->config->soc_family != MV_SOC_ARMADA_XP ) { in mv_timer_attach()
238 irq_cause = read_cpu_ctrl(sc->config->bridge_irq_cause); in mv_timer_attach()
239 irq_cause &= sc->config->irq_timer0_clr; in mv_timer_attach()
241 write_cpu_ctrl(sc->config->bridge_irq_cause, irq_cause); in mv_timer_attach()
247 sc->et.et_name = "CPUTimer0"; in mv_timer_attach()
248 sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT; in mv_timer_attach()
249 sc->et.et_quality = 1000; in mv_timer_attach()
251 sc->et.et_frequency = sc->config->clock_src; in mv_timer_attach()
252 sc->et.et_min_period = (0x00000002LLU << 32) / sc->et.et_frequency; in mv_timer_attach()
253 sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency; in mv_timer_attach()
254 sc->et.et_start = mv_timer_start; in mv_timer_attach()
255 sc->et.et_stop = mv_timer_stop; in mv_timer_attach()
256 sc->et.et_priv = sc; in mv_timer_attach()
257 et_register(&sc->et); in mv_timer_attach()
258 mv_timer_timecounter.tc_frequency = sc->config->clock_src; in mv_timer_attach()
273 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_hardclock()
274 irq_cause &= timer_softc->config->irq_timer0_clr; in mv_hardclock()
275 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_hardclock()
278 if (sc->et.et_active) in mv_hardclock()
279 sc->et.et_event_cb(&sc->et, sc->et.et_arg); in mv_hardclock()
302 return (INITIAL_TIMECOUNTER - mv_get_timer(1)); in mv_timer_get_timecount()
312 nticks = ((timer_softc->config->clock_src / 1000000 + 1) * usec); in mv_delay()
317 nticks -= (val - val_temp); in mv_delay()
319 nticks -= (val + (INITIAL_TIMECOUNTER - val_temp)); in mv_delay()
332 for (; usec > 0; usec--) in DELAY()
333 for (val = 100; val > 0; val--) in DELAY()
347 return (bus_space_read_4(timer_softc->timer_bst, in mv_get_timer_control()
348 timer_softc->timer_bsh, CPU_TIMER_CONTROL)); in mv_get_timer_control()
355 bus_space_write_4(timer_softc->timer_bst, in mv_set_timer_control()
356 timer_softc->timer_bsh, CPU_TIMER_CONTROL, val); in mv_set_timer_control()
363 return (bus_space_read_4(timer_softc->timer_bst, in mv_get_timer()
364 timer_softc->timer_bsh, CPU_TIMER0 + timer * 0x8)); in mv_get_timer()
371 bus_space_write_4(timer_softc->timer_bst, in mv_set_timer()
372 timer_softc->timer_bsh, CPU_TIMER0 + timer * 0x8, val); in mv_set_timer()
379 bus_space_write_4(timer_softc->timer_bst, in mv_set_timer_rel()
380 timer_softc->timer_bsh, CPU_TIMER0_REL + timer * 0x8, val); in mv_set_timer_rel()
388 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_enable_armv5()
389 irq_cause &= timer_softc->config->irq_timer_wd_clr; in mv_watchdog_enable_armv5()
390 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_enable_armv5()
410 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_enable_armadaxp()
411 irq_cause &= timer_softc->config->irq_timer_wd_clr; in mv_watchdog_enable_armadaxp()
412 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_enable_armadaxp()
444 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_disable_armv5()
445 irq_cause &= timer_softc->config->irq_timer_wd_clr; in mv_watchdog_disable_armv5()
446 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_disable_armv5()
462 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_disable_armadaxp()
463 irq_cause &= timer_softc->config->irq_timer_wd_clr; in mv_watchdog_disable_armadaxp()
464 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_disable_armadaxp()
472 * Watchdog event handler.
480 mtx_lock(&timer_softc->timer_mtx); in mv_watchdog_event()
482 if (timer_softc->config->watchdog_disable != NULL) in mv_watchdog_event()
483 timer_softc->config->watchdog_disable(); in mv_watchdog_event()
486 * Watchdog timeout is in nanosecs, calculation according to in mv_watchdog_event()
487 * watchdog(9) in mv_watchdog_event()
490 ticks = (uint64_t)(ns * timer_softc->config->clock_src) / 1000000000; in mv_watchdog_event()
492 if (timer_softc->config->watchdog_disable != NULL) in mv_watchdog_event()
493 timer_softc->config->watchdog_disable(); in mv_watchdog_event()
496 if (timer_softc->config->watchdog_enable != NULL) in mv_watchdog_event()
497 timer_softc->config->watchdog_enable(); in mv_watchdog_event()
501 mtx_unlock(&timer_softc->timer_mtx); in mv_watchdog_event()
511 sc = (struct mv_timer_softc *)et->et_priv; in mv_timer_start()
513 val = ((uint32_t)sc->et.et_frequency * period) >> 32; in mv_timer_start()
517 val1 = ((uint32_t)sc->et.et_frequency * first) >> 32; in mv_timer_start()
556 if (timer_softc->config->soc_family == MV_SOC_ARMADA_XP) { in mv_setup_timers()