Lines Matching refs:WR4
100 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) macro
161 WR4(sc, ICU_INT_CFG(i), 0); in mv_cp110_icu_attach()
249 WR4(sc, ICU_SETSPI_NSR_AL, addr & UINT32_MAX); in mv_cp110_icu_init()
250 WR4(sc, ICU_SETSPI_NSR_AH, (addr >> 32) & UINT32_MAX); in mv_cp110_icu_init()
252 WR4(sc, ICU_CLRSPI_NSR_AL, addr & UINT32_MAX); in mv_cp110_icu_init()
253 WR4(sc, ICU_CLRSPI_NSR_AH, (addr >> 32) & UINT32_MAX); in mv_cp110_icu_init()
256 WR4(sc, ICU_SETSPI_SEI_AL, addr & UINT32_MAX); in mv_cp110_icu_init()
257 WR4(sc, ICU_SETSPI_SEI_AH, (addr >> 32) & UINT32_MAX); in mv_cp110_icu_init()
319 WR4(sc, ICU_INT_CFG(irq_no), vector); in mv_cp110_icu_map_intr()
329 WR4(sc, ICU_INT_CFG(ICU_INT_SATA1), vector); in mv_cp110_icu_map_intr()
331 WR4(sc, ICU_INT_CFG(ICU_INT_SATA0), vector); in mv_cp110_icu_map_intr()
365 WR4(sc, ICU_INT_CFG(irq_no), 0); in mv_cp110_icu_deactivate_intr()