Lines Matching +full:pin +full:-
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
99 int pin; member
158 #define MV_GPIO_LOCK() mtx_lock_spin(&sc->mutex)
159 #define MV_GPIO_UNLOCK() mtx_unlock_spin(&sc->mutex)
160 #define MV_GPIO_ASSERT_LOCKED() mtx_assert(&sc->mutex, MA_OWNED)
192 { "marvell,orion-gpio", 1 },
202 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in mv_gpio_probe()
219 device_printf(sc->dev, "No interrupt-parrent found. " in mv_gpio_setup_interrupts()
223 /* While at parent - store interrupt cells prop */ in mv_gpio_setup_interrupts()
225 "#interrupt-cells", &irq_cells, sizeof(irq_cells)) == -1) { in mv_gpio_setup_interrupts()
226 device_printf(sc->dev, "DTB: Missing #interrupt-cells " in mv_gpio_setup_interrupts()
233 if (size != -1) { in mv_gpio_setup_interrupts()
236 sc->irq_num = size; in mv_gpio_setup_interrupts()
237 device_printf(sc->dev, "%d IRQs available\n", sc->irq_num); in mv_gpio_setup_interrupts()
239 device_printf(sc->dev, "ERROR: no interrupts entry found!\n"); in mv_gpio_setup_interrupts()
243 for (i = 0; i < sc->irq_num; i++) { in mv_gpio_setup_interrupts()
244 sc->irq_rid[i] = i; in mv_gpio_setup_interrupts()
245 sc->irq_res[i] = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, in mv_gpio_setup_interrupts()
246 &sc->irq_rid[i], RF_ACTIVE); in mv_gpio_setup_interrupts()
247 if (!sc->irq_res[i]) { in mv_gpio_setup_interrupts()
248 mtx_destroy(&sc->mutex); in mv_gpio_setup_interrupts()
249 device_printf(sc->dev, in mv_gpio_setup_interrupts()
255 device_printf(sc->dev, "Disable interrupts (offset = %x + EDGE(0x18)\n", sc->offset); in mv_gpio_setup_interrupts()
257 bus_space_write_4(sc->bst, sc->bsh, sc->offset + GPIO_INT_EDGE_MASK, 0); in mv_gpio_setup_interrupts()
258 device_printf(sc->dev, "Disable interrupts (offset = %x + LEV(0x1C))\n", sc->offset); in mv_gpio_setup_interrupts()
259 bus_space_write_4(sc->bst, sc->bsh, sc->offset + GPIO_INT_LEV_MASK, 0); in mv_gpio_setup_interrupts()
261 for (i = 0; i < sc->irq_num; i++) { in mv_gpio_setup_interrupts()
262 device_printf(sc->dev, "Setup intr %d\n", i); in mv_gpio_setup_interrupts()
263 if (bus_setup_intr(sc->dev, sc->irq_res[i], in mv_gpio_setup_interrupts()
266 sc, &sc->ih_cookie[i]) != 0) { in mv_gpio_setup_interrupts()
267 mtx_destroy(&sc->mutex); in mv_gpio_setup_interrupts()
268 bus_release_resource(sc->dev, SYS_RES_IRQ, in mv_gpio_setup_interrupts()
269 sc->irq_rid[i], sc->irq_res[i]); in mv_gpio_setup_interrupts()
270 device_printf(sc->dev, "could not set up intr %d\n", i); in mv_gpio_setup_interrupts()
276 device_printf(sc->dev, "Clear int status (offset = %x)\n", sc->offset); in mv_gpio_setup_interrupts()
277 bus_space_write_4(sc->bst, sc->bsh, sc->offset + GPIO_INT_CAUSE, 0); in mv_gpio_setup_interrupts()
279 sc->debounce_callouts = (struct callout **)malloc(sc->pin_num * in mv_gpio_setup_interrupts()
281 if (sc->debounce_callouts == NULL) in mv_gpio_setup_interrupts()
284 sc->debounce_counters = (int *)malloc(sc->pin_num * sizeof(int), in mv_gpio_setup_interrupts()
286 if (sc->debounce_counters == NULL) in mv_gpio_setup_interrupts()
305 sc->dev = dev; in mv_gpio_attach()
307 if (OF_getencprop(node, "pin-count", &pincnt, sizeof(pcell_t)) >= 0 || in mv_gpio_attach()
309 sc->pin_num = MIN(pincnt, MV_GPIO_MAX_NPINS); in mv_gpio_attach()
311 device_printf(dev, "%d pins available\n", sc->pin_num); in mv_gpio_attach()
313 device_printf(dev, "ERROR: no pin-count or ngpios entry found!\n"); in mv_gpio_attach()
317 if (OF_getencprop(node, "offset", &sc->offset, sizeof(sc->offset)) == -1) in mv_gpio_attach()
318 sc->offset = 0; in mv_gpio_attach()
320 /* Assign generic capabilities to every gpio pin */ in mv_gpio_attach()
321 for(i = 0; i < sc->pin_num; i++) in mv_gpio_attach()
322 sc->gpio_setup[i].gp_caps = GPIO_GENERIC_CAP; in mv_gpio_attach()
324 mtx_init(&sc->mutex, device_get_nameunit(dev), NULL, MTX_SPIN); in mv_gpio_attach()
326 sc->mem_rid = 0; in mv_gpio_attach()
327 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, in mv_gpio_attach()
330 if (!sc->mem_res) { in mv_gpio_attach()
331 mtx_destroy(&sc->mutex); in mv_gpio_attach()
336 sc->bst = rman_get_bustag(sc->mem_res); in mv_gpio_attach()
337 sc->bsh = rman_get_bushandle(sc->mem_res); in mv_gpio_attach()
343 sc->sc_busdev = gpiobus_attach_bus(dev); in mv_gpio_attach()
344 if (sc->sc_busdev == NULL) { in mv_gpio_attach()
345 mtx_destroy(&sc->mutex); in mv_gpio_attach()
347 sc->irq_rid[i], sc->irq_res[i]); in mv_gpio_attach()
405 void (*hand)(void *), void *arg, int pin, int flags, void **cookiep) in mv_gpio_setup_intrhandler() argument
414 if (pin < 0 || pin >= sc->pin_num) in mv_gpio_setup_intrhandler()
416 event = sc->gpio_events[pin]; in mv_gpio_setup_intrhandler()
419 if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_DEBOUNCE) { in mv_gpio_setup_intrhandler()
420 error = mv_gpio_debounce_init(dev, pin); in mv_gpio_setup_intrhandler()
425 } else if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_IRQ_DOUBLE_EDGE) in mv_gpio_setup_intrhandler()
426 mv_gpio_double_edge_init(dev, pin); in mv_gpio_setup_intrhandler()
428 error = intr_event_create(&event, (void *)s, 0, pin, in mv_gpio_setup_intrhandler()
433 "gpio%d:", pin); in mv_gpio_setup_intrhandler()
436 sc->gpio_events[pin] = event; in mv_gpio_setup_intrhandler()
448 sc = (struct mv_gpio_softc *)device_get_softc(s->dev); in mv_gpio_intr_mask()
450 if (s->pin >= sc->pin_num) in mv_gpio_intr_mask()
455 if (sc->gpio_setup[s->pin].gp_flags & (MV_GPIO_IN_IRQ_EDGE | in mv_gpio_intr_mask()
457 mv_gpio_edge(s->dev, s->pin, 0); in mv_gpio_intr_mask()
459 mv_gpio_level(s->dev, s->pin, 0); in mv_gpio_intr_mask()
478 sc = (struct mv_gpio_softc *)device_get_softc(s->dev); in mv_gpio_intr_unmask()
480 if (s->pin >= sc->pin_num) in mv_gpio_intr_unmask()
485 if (sc->gpio_setup[s->pin].gp_flags & (MV_GPIO_IN_IRQ_EDGE | in mv_gpio_intr_unmask()
487 mv_gpio_edge(s->dev, s->pin, 1); in mv_gpio_intr_unmask()
489 mv_gpio_level(s->dev, s->pin, 1); in mv_gpio_intr_unmask()
499 int i, pin; in mv_gpio_exec_intr_handlers() local
508 pin = (high ? (i + GPIO_PINS_PER_REG) : i); in mv_gpio_exec_intr_handlers()
509 if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_DEBOUNCE) in mv_gpio_exec_intr_handlers()
510 mv_gpio_debounce_start(dev, pin); in mv_gpio_exec_intr_handlers()
511 else if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_IRQ_DOUBLE_EDGE) { in mv_gpio_exec_intr_handlers()
512 mv_gpio_polarity(dev, pin, 0, 1); in mv_gpio_exec_intr_handlers()
513 mv_gpio_intr_handler(dev, pin); in mv_gpio_exec_intr_handlers()
515 mv_gpio_intr_handler(dev, pin); in mv_gpio_exec_intr_handlers()
523 mv_gpio_intr_handler(device_t dev, int pin) in mv_gpio_intr_handler() argument
534 isrc.isrc_event = sc->gpio_events[pin]; in mv_gpio_intr_handler()
537 CK_SLIST_EMPTY(&isrc.isrc_event->ie_handlers)) in mv_gpio_intr_handler()
544 mv_gpio_configure(device_t dev, uint32_t pin, uint32_t flags, uint32_t mask) in mv_gpio_configure() argument
551 if (pin >= sc->pin_num) in mv_gpio_configure()
560 if (sc->irq_num == 0) in mv_gpio_configure()
562 error = mv_gpio_debounce_prepare(dev, pin); in mv_gpio_configure()
570 mv_gpio_out_en(dev, pin, 0); in mv_gpio_configure()
573 mv_gpio_value_set(dev, pin, 0); in mv_gpio_configure()
575 mv_gpio_value_set(dev, pin, 1); in mv_gpio_configure()
576 mv_gpio_out_en(dev, pin, 1); in mv_gpio_configure()
580 mv_gpio_blink(dev, pin, flags & MV_GPIO_OUT_BLINK); in mv_gpio_configure()
582 mv_gpio_polarity(dev, pin, flags & MV_GPIO_IN_POL_LOW, 0); in mv_gpio_configure()
584 error = mv_gpio_debounce_setup(dev, pin); in mv_gpio_configure()
591 sc->gpio_setup[pin].gp_flags &= ~(mask); in mv_gpio_configure()
592 sc->gpio_setup[pin].gp_flags |= (flags & mask); in mv_gpio_configure()
600 mv_gpio_double_edge_init(device_t dev, int pin) in mv_gpio_double_edge_init() argument
608 raw_read = (mv_gpio_value_get(dev, pin, 1) ? 1 : 0); in mv_gpio_double_edge_init()
611 mv_gpio_polarity(dev, pin, 1, 0); in mv_gpio_double_edge_init()
613 mv_gpio_polarity(dev, pin, 0, 0); in mv_gpio_double_edge_init()
617 mv_gpio_debounce_setup(device_t dev, int pin) in mv_gpio_debounce_setup() argument
626 c = sc->debounce_callouts[pin]; in mv_gpio_debounce_setup()
639 mv_gpio_debounce_prepare(device_t dev, int pin) in mv_gpio_debounce_prepare() argument
646 c = sc->debounce_callouts[pin]; in mv_gpio_debounce_prepare()
650 sc->debounce_callouts[pin] = c; in mv_gpio_debounce_prepare()
660 mv_gpio_debounce_init(device_t dev, int pin) in mv_gpio_debounce_init() argument
670 cnt = &sc->debounce_counters[pin]; in mv_gpio_debounce_init()
671 raw_read = (mv_gpio_value_get(dev, pin, 1) ? 1 : 0); in mv_gpio_debounce_init()
673 mv_gpio_polarity(dev, pin, 1, 0); in mv_gpio_debounce_init()
676 mv_gpio_polarity(dev, pin, 0, 0); in mv_gpio_debounce_init()
680 mv_gpio_debounced_state_set(dev, pin, raw_read); in mv_gpio_debounce_init()
686 mv_gpio_debounce_start(device_t dev, int pin) in mv_gpio_debounce_start() argument
689 struct mv_gpio_pindev s = {dev, pin}; in mv_gpio_debounce_start()
696 c = sc->debounce_callouts[pin]; in mv_gpio_debounce_start()
713 sd->pin = pin; in mv_gpio_debounce_start()
714 sd->dev = dev; in mv_gpio_debounce_start()
723 int pin; in mv_gpio_debounce() local
730 dev = s->dev; in mv_gpio_debounce()
731 pin = s->pin; in mv_gpio_debounce()
736 raw_read = (mv_gpio_value_get(dev, pin, 1) ? 1 : 0); in mv_gpio_debounce()
737 last_state = (mv_gpio_debounced_state_get(dev, pin) ? 1 : 0); in mv_gpio_debounce()
738 debounce_counter = &sc->debounce_counters[pin]; in mv_gpio_debounce()
748 callout_reset(sc->debounce_callouts[pin], in mv_gpio_debounce()
751 *debounce_counter = *debounce_counter - 1; in mv_gpio_debounce()
753 callout_reset(sc->debounce_callouts[pin], in mv_gpio_debounce()
756 mv_gpio_debounced_state_set(dev, pin, raw_read); in mv_gpio_debounce()
765 if (((sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_POL_LOW) && in mv_gpio_debounce()
767 (((sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_POL_LOW) == 0) && in mv_gpio_debounce()
769 (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_IRQ_DOUBLE_EDGE)) in mv_gpio_debounce()
770 mv_gpio_intr_handler(dev, pin); in mv_gpio_debounce()
773 mv_gpio_polarity(dev, pin, 0, 1); in mv_gpio_debounce()
776 callout_deactivate(sc->debounce_callouts[pin]); in mv_gpio_debounce()
784 mv_gpio_debounced_state_set(device_t dev, int pin, uint8_t new_state) in mv_gpio_debounced_state_set() argument
792 if (pin >= GPIO_PINS_PER_REG) { in mv_gpio_debounced_state_set()
793 old_state = &sc->debounced_state_hi; in mv_gpio_debounced_state_set()
794 pin -= GPIO_PINS_PER_REG; in mv_gpio_debounced_state_set()
796 old_state = &sc->debounced_state_lo; in mv_gpio_debounced_state_set()
799 *old_state |= (1 << pin); in mv_gpio_debounced_state_set()
801 *old_state &= ~(1 << pin); in mv_gpio_debounced_state_set()
805 mv_gpio_debounced_state_get(device_t dev, int pin) in mv_gpio_debounced_state_get() argument
813 if (pin >= GPIO_PINS_PER_REG) { in mv_gpio_debounced_state_get()
814 state = &sc->debounced_state_hi; in mv_gpio_debounced_state_get()
815 pin -= GPIO_PINS_PER_REG; in mv_gpio_debounced_state_get()
817 state = &sc->debounced_state_lo; in mv_gpio_debounced_state_get()
819 return (*state & (1 << pin)); in mv_gpio_debounced_state_get()
823 mv_gpio_out(device_t dev, uint32_t pin, uint8_t val, uint8_t enable) in mv_gpio_out() argument
830 mv_gpio_value_set(dev, pin, val); in mv_gpio_out()
831 mv_gpio_out_en(dev, pin, enable); in mv_gpio_out()
837 mv_gpio_in(device_t dev, uint32_t pin) in mv_gpio_in() argument
845 if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_DEBOUNCE) { in mv_gpio_in()
846 if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_POL_LOW) in mv_gpio_in()
847 state = (mv_gpio_debounced_state_get(dev, pin) ? 0 : 1); in mv_gpio_in()
849 state = (mv_gpio_debounced_state_get(dev, pin) ? 1 : 0); in mv_gpio_in()
850 } else if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_IRQ_DOUBLE_EDGE) { in mv_gpio_in()
851 if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_POL_LOW) in mv_gpio_in()
852 state = (mv_gpio_value_get(dev, pin, 1) ? 0 : 1); in mv_gpio_in()
854 state = (mv_gpio_value_get(dev, pin, 1) ? 1 : 0); in mv_gpio_in()
856 state = (mv_gpio_value_get(dev, pin, 0) ? 1 : 0); in mv_gpio_in()
867 return (bus_space_read_4(sc->bst, sc->bsh, sc->offset + reg)); in mv_gpio_reg_read()
876 bus_space_write_4(sc->bst, sc->bsh, sc->offset + reg, val); in mv_gpio_reg_write()
880 mv_gpio_reg_set(device_t dev, uint32_t reg, uint32_t pin) in mv_gpio_reg_set() argument
885 reg_val |= GPIO(pin); in mv_gpio_reg_set()
890 mv_gpio_reg_clear(device_t dev, uint32_t reg, uint32_t pin) in mv_gpio_reg_clear() argument
895 reg_val &= ~(GPIO(pin)); in mv_gpio_reg_clear()
900 mv_gpio_out_en(device_t dev, uint32_t pin, uint8_t enable) in mv_gpio_out_en() argument
906 if (pin >= sc->pin_num) in mv_gpio_out_en()
912 mv_gpio_reg_clear(dev, reg, pin); in mv_gpio_out_en()
914 mv_gpio_reg_set(dev, reg, pin); in mv_gpio_out_en()
918 mv_gpio_blink(device_t dev, uint32_t pin, uint8_t enable) in mv_gpio_blink() argument
924 if (pin >= sc->pin_num) in mv_gpio_blink()
930 mv_gpio_reg_set(dev, reg, pin); in mv_gpio_blink()
932 mv_gpio_reg_clear(dev, reg, pin); in mv_gpio_blink()
936 mv_gpio_polarity(device_t dev, uint32_t pin, uint8_t enable, uint8_t toggle) in mv_gpio_polarity() argument
942 if (pin >= sc->pin_num) in mv_gpio_polarity()
948 reg_val = mv_gpio_reg_read(dev, reg) & GPIO(pin); in mv_gpio_polarity()
950 mv_gpio_reg_clear(dev, reg, pin); in mv_gpio_polarity()
952 mv_gpio_reg_set(dev, reg, pin); in mv_gpio_polarity()
954 mv_gpio_reg_set(dev, reg, pin); in mv_gpio_polarity()
956 mv_gpio_reg_clear(dev, reg, pin); in mv_gpio_polarity()
960 mv_gpio_level(device_t dev, uint32_t pin, uint8_t enable) in mv_gpio_level() argument
966 if (pin >= sc->pin_num) in mv_gpio_level()
972 mv_gpio_reg_set(dev, reg, pin); in mv_gpio_level()
974 mv_gpio_reg_clear(dev, reg, pin); in mv_gpio_level()
978 mv_gpio_edge(device_t dev, uint32_t pin, uint8_t enable) in mv_gpio_edge() argument
984 if (pin >= sc->pin_num) in mv_gpio_edge()
990 mv_gpio_reg_set(dev, reg, pin); in mv_gpio_edge()
992 mv_gpio_reg_clear(dev, reg, pin); in mv_gpio_edge()
998 uint32_t reg, pin; in mv_gpio_int_ack() local
1000 sc = (struct mv_gpio_softc *)device_get_softc(s->dev); in mv_gpio_int_ack()
1001 pin = s->pin; in mv_gpio_int_ack()
1003 if (pin >= sc->pin_num) in mv_gpio_int_ack()
1008 mv_gpio_reg_clear(s->dev, reg, pin); in mv_gpio_int_ack()
1012 mv_gpio_value_get(device_t dev, uint32_t pin, uint8_t exclude_polar) in mv_gpio_value_get() argument
1018 if (pin >= sc->pin_num) in mv_gpio_value_get()
1028 return ((reg_val & GPIO(pin)) ^ (polar_reg_val & GPIO(pin))); in mv_gpio_value_get()
1030 return (reg_val & GPIO(pin)); in mv_gpio_value_get()
1034 mv_gpio_value_set(device_t dev, uint32_t pin, uint8_t val) in mv_gpio_value_set() argument
1042 if (pin >= sc->pin_num) in mv_gpio_value_set()
1048 mv_gpio_reg_set(dev, reg, pin); in mv_gpio_value_set()
1050 mv_gpio_reg_clear(dev, reg, pin); in mv_gpio_value_set()
1065 *maxpin = sc->pin_num; in mv_gpio_pin_max()
1071 mv_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) in mv_gpio_pin_getcaps() argument
1077 if (pin >= sc->pin_num) in mv_gpio_pin_getcaps()
1081 *caps = sc->gpio_setup[pin].gp_caps; in mv_gpio_pin_getcaps()
1088 mv_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) in mv_gpio_pin_getflags() argument
1094 if (pin >= sc->pin_num) in mv_gpio_pin_getflags()
1098 *flags = sc->gpio_setup[pin].gp_flags; in mv_gpio_pin_getflags()
1105 mv_gpio_pin_getname(device_t dev, uint32_t pin, char *name) in mv_gpio_pin_getname() argument
1111 if (pin >= sc->pin_num) in mv_gpio_pin_getname()
1115 memcpy(name, sc->gpio_setup[pin].gp_name, GPIOMAXNAME); in mv_gpio_pin_getname()
1122 mv_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) in mv_gpio_pin_setflags() argument
1126 if (pin >= sc->pin_num) in mv_gpio_pin_setflags()
1130 if ((flags & sc->gpio_setup[pin].gp_caps) != flags) in mv_gpio_pin_setflags()
1133 ret = mv_gpio_configure(dev, pin, flags, ~0); in mv_gpio_pin_setflags()
1139 mv_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) in mv_gpio_pin_set() argument
1142 if (pin >= sc->pin_num) in mv_gpio_pin_set()
1146 mv_gpio_value_set(dev, pin, value); in mv_gpio_pin_set()
1153 mv_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value) in mv_gpio_pin_get() argument
1159 if (pin >= sc->pin_num) in mv_gpio_pin_get()
1163 *value = mv_gpio_in(dev, pin); in mv_gpio_pin_get()
1170 mv_gpio_pin_toggle(device_t dev, uint32_t pin) in mv_gpio_pin_toggle() argument
1174 if (pin >= sc->pin_num) in mv_gpio_pin_toggle()
1178 value = mv_gpio_in(dev, pin); in mv_gpio_pin_toggle()
1180 mv_gpio_value_set(dev, pin, value); in mv_gpio_pin_toggle()
1191 return (sc->sc_busdev); in mv_gpio_get_bus()
1196 pcell_t *gpios, uint32_t *pin, uint32_t *flags) in mv_gpio_map_gpios() argument
1200 if (gpios[0] >= sc->pin_num) in mv_gpio_map_gpios()
1203 *pin = gpios[0]; in mv_gpio_map_gpios()
1205 mv_gpio_configure(bus, *pin, *flags, ~0); in mv_gpio_map_gpios()