71 	tbg_mux = &device_def->clk_def.full_dd.tbg_mux;  in a37x0_periph_d_register_full_clk_dd()
72 	div1 = &device_def->clk_def.full_dd.div1;  in a37x0_periph_d_register_full_clk_dd()
73 	div2 = &device_def->clk_def.full_dd.div2;  in a37x0_periph_d_register_full_clk_dd()
74 	gate = &device_def->clk_def.full_dd.gate;  in a37x0_periph_d_register_full_clk_dd()
75 	clk_mux = &device_def->clk_def.full_dd.clk_mux;  in a37x0_periph_d_register_full_clk_dd()
135 	tbg_mux = &device_def->clk_def.full_d.tbg_mux;  in a37x0_periph_d_register_full_clk()
136 	div = &device_def->clk_def.full_d.div;  in a37x0_periph_d_register_full_clk()
137 	gate = &device_def->clk_def.full_d.gate;  in a37x0_periph_d_register_full_clk()
138 	clk_mux = &device_def->clk_def.full_d. clk_mux;  in a37x0_periph_d_register_full_clk()
189 	tbg_mux = &device_def->clk_def.cpu.tbg_mux;  in a37x0_periph_d_register_periph_cpu()
190 	div = &device_def->clk_def.cpu.div;  in a37x0_periph_d_register_periph_cpu()
191 	clk_mux = &device_def->clk_def.cpu.clk_mux;  in a37x0_periph_d_register_periph_cpu()
234 	tbg_mux = &device_def->clk_def.mdd.tbg_mux;  in a37x0_periph_d_register_mdd()
235 	div1 = &device_def->clk_def.mdd.div1;  in a37x0_periph_d_register_mdd()
236 	div2 = &device_def->clk_def.mdd.div2;  in a37x0_periph_d_register_mdd()
237 	clk_mux = &device_def->clk_def.mdd.clk_mux;  in a37x0_periph_d_register_mdd()