Lines Matching refs:full_dd
66 .clk_def.full_dd.tbg_mux.clkdef.name = _tbg_mux_name, \
67 .clk_def.full_dd.tbg_mux.offset = TBG_SEL, \
68 .clk_def.full_dd.tbg_mux.shift = _tbg_mux_shift, \
69 .clk_def.full_dd.tbg_mux.width = 0x2, \
70 .clk_def.full_dd.tbg_mux.mux_flags = 0x0, \
71 .clk_def.full_dd.div1.clkdef.name = _div1_name, \
72 .clk_def.full_dd.div1.offset = _div1_reg, \
73 .clk_def.full_dd.div1.i_shift = _div1_shift, \
74 .clk_def.full_dd.div1.i_width = 0x3, \
75 .clk_def.full_dd.div1.f_shift = 0x0, \
76 .clk_def.full_dd.div1.f_width = 0x0, \
77 .clk_def.full_dd.div1.div_flags = 0x0, \
78 .clk_def.full_dd.div1.div_table = NULL, \
79 .clk_def.full_dd.div2.clkdef.name = _div2_name, \
80 .clk_def.full_dd.div2.offset = _div2_reg, \
81 .clk_def.full_dd.div2.i_shift = _div2_shift, \
82 .clk_def.full_dd.div2.i_width = 0x3, \
83 .clk_def.full_dd.div2.f_shift = 0x0, \
84 .clk_def.full_dd.div2.f_width = 0x0, \
85 .clk_def.full_dd.div2.div_flags = 0x0, \
86 .clk_def.full_dd.div2.div_table = NULL, \
87 .clk_def.full_dd.clk_mux.clkdef.name = _clk_mux_name, \
88 .clk_def.full_dd.clk_mux.offset = CLK_SEL, \
89 .clk_def.full_dd.clk_mux.shift = _clk_mux_shift, \
90 .clk_def.full_dd.clk_mux.width = 0x1, \
91 .clk_def.full_dd.clk_mux.mux_flags = 0x0, \
92 .clk_def.full_dd.gate.clkdef.name = _name, \
93 .clk_def.full_dd.gate.offset = CLK_DIS, \
94 .clk_def.full_dd.gate.shift = _gate_shift, \
95 .clk_def.full_dd.gate.on_value = 0, \
96 .clk_def.full_dd.gate.off_value = 1, \
97 .clk_def.full_dd.gate.mask = 0x1, \
98 .clk_def.full_dd.gate.gate_flags = 0x0 \
371 struct a37x0_periph_clk_dd_def full_dd; member