Lines Matching refs:irq_cause
209 uint32_t val, irq_cause, irq_mask; in mv_wdt_enable_armv5() local
211 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armv5()
212 irq_cause &= IRQ_TIMER_WD_CLR; in mv_wdt_enable_armv5()
213 write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause); in mv_wdt_enable_armv5()
231 uint32_t val, irq_cause; in mv_wdt_enable_armada_38x_xp_helper() local
233 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armada_38x_xp_helper()
234 irq_cause &= IRQ_TIMER_WD_CLR; in mv_wdt_enable_armada_38x_xp_helper()
235 write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause); in mv_wdt_enable_armada_38x_xp_helper()
249 uint32_t val, irq_cause; in mv_wdt_enable_armada_38x() local
251 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armada_38x()
252 irq_cause &= IRQ_TIMER_WD_CLR; in mv_wdt_enable_armada_38x()
253 write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause); in mv_wdt_enable_armada_38x()
265 uint32_t val, irq_cause; in mv_wdt_enable_armada_xp() local
266 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE_ARMADAXP); in mv_wdt_enable_armada_xp()
267 irq_cause &= IRQ_TIMER_WD_CLR_ARMADAXP; in mv_wdt_enable_armada_xp()
268 write_cpu_ctrl(BRIDGE_IRQ_CAUSE_ARMADAXP, irq_cause); in mv_wdt_enable_armada_xp()
280 uint32_t val, irq_cause, irq_mask; in mv_wdt_disable_armv5() local
294 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_disable_armv5()
295 irq_cause &= IRQ_TIMER_WD_CLR; in mv_wdt_disable_armv5()
296 write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause); in mv_wdt_disable_armv5()