Lines Matching +full:reset +full:- +full:source

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
7  * Redistribution and use in source and binary forms, with or without
10  * 1. Redistributions of source code must retain the above copyright
51     &last_reset_status, 0, "Last reset status register");
54     "unknown", 0, "Last reset reason");
58  * cpu_reset() because the watchdog is the only way for software to reset the
77 	 * If the watchdog hardware has been set up to trigger an external reset  in imx_wdog_cpu_reset()
78 	 * signal on watchdog timeout, then we do software-requested rebooting  in imx_wdog_cpu_reset()
79 	 * the same way, by asserting the external reset signal.  in imx_wdog_cpu_reset()
81 	 * Asserting external reset is supposed to result in some external  in imx_wdog_cpu_reset()
83 	 * and stabilizing system voltages, or taking other system-wide reset  in imx_wdog_cpu_reset()
86 	 * the code to assert a software reset as well.  in imx_wdog_cpu_reset()
89 		cr &= ~WDOG_CR_WDA; /* Assert active-low ext reset bit. */  in imx_wdog_cpu_reset()
93 		    "External reset failed, trying internal cpu-reset\n");  in imx_wdog_cpu_reset()
100 	 * reset.  Writing it 3 times in a row ensures at least 2 of the writes  in imx_wdog_cpu_reset()
103 	cr &= ~WDOG_CR_SRS; /* Assert active-low software reset bit. */  in imx_wdog_cpu_reset()
108 	/* Reset happens on the next tick of the 32khz clock, wait for it. */  in imx_wdog_cpu_reset()