Lines Matching +full:out +full:- +full:of +full:- +full:reset

1 /*-
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52     &last_reset_status, 0, "Last reset status register");
55     "unknown", 0, "Last reset reason");
59  * cpu_reset() because the watchdog is the only way for software to reset the
78 	 * If the watchdog hardware has been set up to trigger an external reset  in imx_wdog_cpu_reset()
79 	 * signal on watchdog timeout, then we do software-requested rebooting  in imx_wdog_cpu_reset()
80 	 * the same way, by asserting the external reset signal.  in imx_wdog_cpu_reset()
82 	 * Asserting external reset is supposed to result in some external  in imx_wdog_cpu_reset()
84 	 * and stabilizing system voltages, or taking other system-wide reset  in imx_wdog_cpu_reset()
85 	 * actions.  Just in case there is some kind of misconfiguration, we  in imx_wdog_cpu_reset()
86 	 * hang out and do nothing for a full second, then continue on into  in imx_wdog_cpu_reset()
87 	 * the code to assert a software reset as well.  in imx_wdog_cpu_reset()
90 		cr &= ~WDOG_CR_WDA; /* Assert active-low ext reset bit. */  in imx_wdog_cpu_reset()
94 		    "External reset failed, trying internal cpu-reset\n");  in imx_wdog_cpu_reset()
100 	 * within the same cycle of the 32khz clock to reliably trigger the  in imx_wdog_cpu_reset()
101 	 * reset.  Writing it 3 times in a row ensures at least 2 of the writes  in imx_wdog_cpu_reset()
104 	cr &= ~WDOG_CR_SRS; /* Assert active-low software reset bit. */  in imx_wdog_cpu_reset()
109 	/* Reset happens on the next tick of the 32khz clock, wait for it. */  in imx_wdog_cpu_reset()