109 	if (OF_getencprop(node, propname, &iparent, sizeof(iparent)) <= 0)  in fix_node_iparent()
140 	if (result <= 0)  in fix_fdt_interrupt_data()
152 	if (result <= 0)  in fix_fdt_interrupt_data()
208 	return (0);  in imx6_attach()
214 	const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004;  in imx6_late_init()
238 	const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;  in imx6_devmap_init()
239 	const uint32_t IMX6_ARMMP_SIZE = 0x00100000;  in imx6_devmap_init()
240 	const uint32_t IMX6_AIPS1_PHYS = 0x02000000;  in imx6_devmap_init()
241 	const uint32_t IMX6_AIPS1_SIZE = 0x00100000;  in imx6_devmap_init()
242 	const uint32_t IMX6_AIPS2_PHYS = 0x02100000;  in imx6_devmap_init()
243 	const uint32_t IMX6_AIPS2_SIZE = 0x00100000;  in imx6_devmap_init()
249 	return (0);  in imx6_devmap_init()
255 	const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;  in imx6_cpu_reset()
280  *      digprog    = 0x00610001
281  *      hwsoc      = 0x00000062
282  *      scu config = 0x00000500
284  *      digprog    = 0x00630002
285  *      hwsoc      = 0x00000063
286  *      scu config = 0x00005503
294 	const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;  in imx_soc_type()
295 #define	HWSOC_MX6SL	0x60  in imx_soc_type()
296 #define	HWSOC_MX6DL	0x61  in imx_soc_type()
297 #define	HWSOC_MX6SOLO	0x62  in imx_soc_type()
298 #define	HWSOC_MX6Q	0x63  in imx_soc_type()
299 #define	HWSOC_MX6UL	0x64  in imx_soc_type()
301 	if (soctype != 0)  in imx_soc_type()
312 		/*printf("digprog = 0x%08x\n", digprog);*/  in imx_soc_type()
316 				/*printf("scu config = 0x%08x\n", *pcr);*/  in imx_soc_type()
317 				if ((*pcr & 0x03) == 0) {  in imx_soc_type()
324 	/* printf("hwsoc 0x%08x\n", hwsoc); */  in imx_soc_type()
343 		printf("imx_soc_type: Don't understand hwsoc 0x%02x, "  in imx_soc_type()
344 		    "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);  in imx_soc_type()
354  *   option SOCDEV_PA=0x02000000
355  *   option SOCDEV_VA=0x02000000
357  * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
361 #if 0 
365 	volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
366 	volatile uint32_t * UART_TX_REG   = (uint32_t *)0x02020040;
369 	while ((*UART_STAT_REG & UART_TXRDY) == 0)
392 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80);
393 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80);
394 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80);
395 FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67);