Lines Matching +full:4 +full:- +full:cpu
63 #define BCM_LINTC_TIMER_CFG_REG(n) (0x40 + (n) * 4)
64 #define BCM_LINTC_MBOX_CFG_REG(n) (0x50 + (n) * 4)
65 #define BCM_LINTC_PENDING_REG(n) (0x60 + (n) * 4)
84 #define BCM_LINTC_PIRR_FIQ_EN_CORE(n) (1 << ((n) + 4))
88 #define BCM_LINTC_TCR_FIQ_EN_TIMER(n) (1 << ((n) + 4))
92 #define BCM_LINTC_MCR_FIQ_EN_MBOX(n) (1 << ((n) + 4))
98 #define BCM_LINTC_MBOX0_IRQ 4
165 #define BCM_LINTC_LOCK(sc) mtx_lock_spin(&(sc)->bls_mtx)
166 #define BCM_LINTC_UNLOCK(sc) mtx_unlock_spin(&(sc)->bls_mtx)
167 #define BCM_LINTC_LOCK_INIT(sc) mtx_init(&(sc)->bls_mtx, \
168 device_get_nameunit((sc)->bls_dev), "bmc_local_intc", MTX_SPIN)
169 #define BCM_LINTC_LOCK_DESTROY(sc) mtx_destroy(&(sc)->bls_mtx)
172 bus_space_read_4((sc)->bls_bst, (sc)->bls_bsh, (reg))
174 bus_space_write_4((sc)->bls_bst, (sc)->bls_bsh, (reg), (val))
196 uint32_t cpu; in bcm_lintc_timer_mask() local
198 cpus = &bli->bli_isrc.isrc_cpu; in bcm_lintc_timer_mask()
201 for (cpu = 0; cpu < 4; cpu++) in bcm_lintc_timer_mask()
202 if (CPU_ISSET(cpu, cpus)) in bcm_lintc_timer_mask()
203 bcm_lintc_rwreg_clr(sc, BCM_LINTC_TIMER_CFG_REG(cpu), in bcm_lintc_timer_mask()
204 bli->bli_mask); in bcm_lintc_timer_mask()
212 uint32_t cpu; in bcm_lintc_timer_unmask() local
214 cpus = &bli->bli_isrc.isrc_cpu; in bcm_lintc_timer_unmask()
217 for (cpu = 0; cpu < 4; cpu++) in bcm_lintc_timer_unmask()
218 if (CPU_ISSET(cpu, cpus)) in bcm_lintc_timer_unmask()
219 bcm_lintc_rwreg_set(sc, BCM_LINTC_TIMER_CFG_REG(cpu), in bcm_lintc_timer_unmask()
220 bli->bli_mask); in bcm_lintc_timer_unmask()
237 bcm_lintc_write_4(sc, BCM_LINTC_GPU_ROUTING_REG, bli->bli_value); in bcm_lintc_gpu_unmask()
244 uint32_t cpu, mask; in bcm_lintc_pmu_mask() local
247 cpus = &bli->bli_isrc.isrc_cpu; in bcm_lintc_pmu_mask()
250 for (cpu = 0; cpu < 4; cpu++) in bcm_lintc_pmu_mask()
251 if (CPU_ISSET(cpu, cpus)) in bcm_lintc_pmu_mask()
252 mask |= BCM_LINTC_PIRR_IRQ_EN_CORE(cpu); in bcm_lintc_pmu_mask()
253 /* Write-clear register. */ in bcm_lintc_pmu_mask()
262 uint32_t cpu, mask; in bcm_lintc_pmu_unmask() local
265 cpus = &bli->bli_isrc.isrc_cpu; in bcm_lintc_pmu_unmask()
268 for (cpu = 0; cpu < 4; cpu++) in bcm_lintc_pmu_unmask()
269 if (CPU_ISSET(cpu, cpus)) in bcm_lintc_pmu_unmask()
270 mask |= BCM_LINTC_PIRR_IRQ_EN_CORE(cpu); in bcm_lintc_pmu_unmask()
271 /* Write-set register. */ in bcm_lintc_pmu_unmask()
280 switch (bli->bli_irq) { in bcm_lintc_mask()
299 panic("%s: not implemented for irq %u", __func__, bli->bli_irq); in bcm_lintc_mask()
307 switch (bli->bli_irq) { in bcm_lintc_unmask()
326 panic("%s: not implemented for irq %u", __func__, bli->bli_irq); in bcm_lintc_unmask()
334 u_int cpu; in bcm_lintc_ipi_write() local
338 for (cpu = 0; cpu < mp_ncpus; cpu++) in bcm_lintc_ipi_write()
339 if (CPU_ISSET(cpu, &cpus)) in bcm_lintc_ipi_write()
340 bcm_lintc_write_4(sc, BCM_LINTC_MBOX0_SET_REG(cpu), in bcm_lintc_ipi_write()
345 bcm_lintc_ipi_dispatch(struct bcm_lintc_softc *sc, u_int cpu, in bcm_lintc_ipi_dispatch() argument
351 mask = bcm_lintc_read_4(sc, BCM_LINTC_MBOX0_CLR_REG(cpu)); in bcm_lintc_ipi_dispatch()
353 device_printf(sc->bls_dev, "Spurious ipi detected\n"); in bcm_lintc_ipi_dispatch()
364 bcm_lintc_write_4(sc, BCM_LINTC_MBOX0_CLR_REG(cpu), 1 << ipi); in bcm_lintc_ipi_dispatch()
381 bli = &sc->bls_isrcs[irq]; in bcm_lintc_irq_dispatch()
382 if (intr_isrc_dispatch(&bli->bli_isrc, tf) != 0) in bcm_lintc_irq_dispatch()
383 device_printf(sc->bls_dev, "Stray irq %u detected\n", irq); in bcm_lintc_irq_dispatch()
390 u_int cpu; in bcm_lintc_intr() local
395 cpu = PCPU_GET(cpuid); in bcm_lintc_intr()
396 tf = curthread->td_intr_frame; in bcm_lintc_intr()
399 reg = bcm_lintc_read_4(sc, BCM_LINTC_PENDING_REG(cpu)); in bcm_lintc_intr()
404 bcm_lintc_ipi_dispatch(sc, cpu, tf); in bcm_lintc_intr()
423 device_printf(sc->bls_dev, "Unknown interrupt(s) %x\n", reg); in bcm_lintc_intr()
425 device_printf(sc->bls_dev, "Spurious interrupt detected\n"); in bcm_lintc_intr()
442 arm_irq_memory_barrier(bli->bli_irq); in bcm_lintc_enable_intr()
453 if (data->type != INTR_MAP_DATA_FDT) in bcm_lintc_map_intr()
457 if (daf->ncells > 2 || daf->cells[0] >= BCM_LINTC_NIRQS) in bcm_lintc_map_intr()
463 *isrcp = &sc->bls_isrcs[daf->cells[0]].bli_isrc; in bcm_lintc_map_intr()
472 if (bli->bli_irq == BCM_LINTC_GPU_IRQ) in bcm_lintc_pre_ithread()
490 if (bli->bli_irq == BCM_LINTC_GPU_IRQ) in bcm_lintc_post_ithread()
509 if (isrc->isrc_handlers == 0 && isrc->isrc_flags & INTR_ISRCF_PPI) { in bcm_lintc_setup_intr()
512 CPU_SET(PCPU_GET(cpuid), &isrc->isrc_cpu); in bcm_lintc_setup_intr()
520 bcm_lintc_init_rwreg_on_ap(struct bcm_lintc_softc *sc, u_int cpu, u_int irq, in bcm_lintc_init_rwreg_on_ap() argument
524 if (intr_isrc_init_on_cpu(&sc->bls_isrcs[irq].bli_isrc, cpu)) in bcm_lintc_init_rwreg_on_ap()
529 bcm_lintc_init_pmu_on_ap(struct bcm_lintc_softc *sc, u_int cpu) in bcm_lintc_init_pmu_on_ap() argument
531 struct intr_irqsrc *isrc = &sc->bls_isrcs[BCM_LINTC_PMU_IRQ].bli_isrc; in bcm_lintc_init_pmu_on_ap()
533 if (intr_isrc_init_on_cpu(isrc, cpu)) { in bcm_lintc_init_pmu_on_ap()
534 /* Write-set register. */ in bcm_lintc_init_pmu_on_ap()
536 BCM_LINTC_PIRR_IRQ_EN_CORE(cpu)); in bcm_lintc_init_pmu_on_ap()
543 u_int cpu; in bcm_lintc_init_secondary() local
546 cpu = PCPU_GET(cpuid); in bcm_lintc_init_secondary()
550 bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER0_IRQ, in bcm_lintc_init_secondary()
551 BCM_LINTC_TIMER_CFG_REG(cpu), BCM_LINTC_TCR_IRQ_EN_TIMER(0)); in bcm_lintc_init_secondary()
552 bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER1_IRQ, in bcm_lintc_init_secondary()
553 BCM_LINTC_TIMER_CFG_REG(cpu), BCM_LINTC_TCR_IRQ_EN_TIMER(1)); in bcm_lintc_init_secondary()
554 bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER2_IRQ, in bcm_lintc_init_secondary()
555 BCM_LINTC_TIMER_CFG_REG(cpu), BCM_LINTC_TCR_IRQ_EN_TIMER(2)); in bcm_lintc_init_secondary()
556 bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER3_IRQ, in bcm_lintc_init_secondary()
557 BCM_LINTC_TIMER_CFG_REG(cpu), BCM_LINTC_TCR_IRQ_EN_TIMER(3)); in bcm_lintc_init_secondary()
558 bcm_lintc_init_pmu_on_ap(sc, cpu); in bcm_lintc_init_secondary()
568 KASSERT(isrc == &sc->bls_isrcs[BCM_LINTC_MBOX0_IRQ].bli_isrc, in bcm_lintc_ipi_send()
580 *isrcp = &sc->bls_isrcs[BCM_LINTC_MBOX0_IRQ].bli_isrc; in bcm_lintc_ipi_setup()
596 bisrcs = sc->bls_isrcs; in bcm_lintc_pic_attach()
597 name = device_get_nameunit(sc->bls_dev); in bcm_lintc_pic_attach()
638 error = intr_isrc_register(&bisrcs[irq].bli_isrc, sc->bls_dev, in bcm_lintc_pic_attach()
644 xref = OF_xref_from_node(ofw_bus_get_node(sc->bls_dev)); in bcm_lintc_pic_attach()
645 pic = intr_pic_register(sc->bls_dev, xref); in bcm_lintc_pic_attach()
649 error = intr_pic_claim_root(sc->bls_dev, xref, bcm_lintc_intr, sc, in bcm_lintc_pic_attach()
655 error = intr_ipi_pic_register(sc->bls_dev, 0); in bcm_lintc_pic_attach()
670 if (!ofw_bus_is_compatible(dev, "brcm,bcm2836-l1-intc")) in bcm_lintc_probe()
672 if (!ofw_bus_has_prop(dev, "interrupt-controller")) in bcm_lintc_probe()
682 int cpu, rid; in bcm_lintc_attach() local
686 sc->bls_dev = dev; in bcm_lintc_attach()
691 sc->bls_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in bcm_lintc_attach()
693 if (sc->bls_mem == NULL) { in bcm_lintc_attach()
698 sc->bls_bst = rman_get_bustag(sc->bls_mem); in bcm_lintc_attach()
699 sc->bls_bsh = rman_get_bushandle(sc->bls_mem); in bcm_lintc_attach()
705 for (cpu = 0; cpu < 4; cpu++) in bcm_lintc_attach()
706 bcm_lintc_write_4(sc, BCM_LINTC_TIMER_CFG_REG(cpu), 0); in bcm_lintc_attach()
710 for (cpu = 0; cpu < 4; cpu++) in bcm_lintc_attach()
711 bcm_lintc_write_4(sc, BCM_LINTC_MBOX_CFG_REG(cpu), in bcm_lintc_attach()