312 vmx_msr_guest_init(struct vmx *vmx, struct vmx_vcpu *vcpu)  in vmx_msr_guest_init()  argument
318 	if (vcpu->vcpuid == 0) {  in vmx_msr_guest_init()
329 	vcpu->guest_msrs[IDX_MSR_PAT] = PAT_VALUE(0, PAT_WRITE_BACK) |  in vmx_msr_guest_init()
342 vmx_msr_guest_enter(struct vmx_vcpu *vcpu)  in vmx_msr_guest_enter()  argument
347 	wrmsr(MSR_LSTAR, vcpu->guest_msrs[IDX_MSR_LSTAR]);  in vmx_msr_guest_enter()
348 	wrmsr(MSR_CSTAR, vcpu->guest_msrs[IDX_MSR_CSTAR]);  in vmx_msr_guest_enter()
349 	wrmsr(MSR_STAR, vcpu->guest_msrs[IDX_MSR_STAR]);  in vmx_msr_guest_enter()
350 	wrmsr(MSR_SF_MASK, vcpu->guest_msrs[IDX_MSR_SF_MASK]);  in vmx_msr_guest_enter()
351 	wrmsr(MSR_KGSBASE, vcpu->guest_msrs[IDX_MSR_KGSBASE]);  in vmx_msr_guest_enter()
355 vmx_msr_guest_enter_tsc_aux(struct vmx *vmx, struct vmx_vcpu *vcpu)  in vmx_msr_guest_enter_tsc_aux()  argument
357 	uint64_t guest_tsc_aux = vcpu->guest_msrs[IDX_MSR_TSC_AUX];  in vmx_msr_guest_enter_tsc_aux()
365 vmx_msr_guest_exit(struct vmx_vcpu *vcpu)  in vmx_msr_guest_exit()  argument
369 	vcpu->guest_msrs[IDX_MSR_LSTAR] = rdmsr(MSR_LSTAR);  in vmx_msr_guest_exit()
370 	vcpu->guest_msrs[IDX_MSR_CSTAR] = rdmsr(MSR_CSTAR);  in vmx_msr_guest_exit()
371 	vcpu->guest_msrs[IDX_MSR_STAR] = rdmsr(MSR_STAR);  in vmx_msr_guest_exit()
372 	vcpu->guest_msrs[IDX_MSR_SF_MASK] = rdmsr(MSR_SF_MASK);  in vmx_msr_guest_exit()
373 	vcpu->guest_msrs[IDX_MSR_KGSBASE] = rdmsr(MSR_KGSBASE);  in vmx_msr_guest_exit()
385 vmx_msr_guest_exit_tsc_aux(struct vmx *vmx, struct vmx_vcpu *vcpu)  in vmx_msr_guest_exit_tsc_aux()  argument
387 	uint64_t guest_tsc_aux = vcpu->guest_msrs[IDX_MSR_TSC_AUX];  in vmx_msr_guest_exit_tsc_aux()
402 vmx_rdmsr(struct vmx_vcpu *vcpu, u_int num, uint64_t *val, bool *retu)  in vmx_rdmsr()  argument
419 		if (vm_rdmtrr(&vcpu->mtrr, num, val) != 0) {  in vmx_rdmsr()
420 			vm_inject_gp(vcpu->vcpu);  in vmx_rdmsr()
434 		*val = vcpu->guest_msrs[IDX_MSR_PAT];  in vmx_rdmsr()
444 vmx_wrmsr(struct vmx_vcpu *vcpu, u_int num, uint64_t val, bool *retu)  in vmx_wrmsr()  argument
461 		if (vm_wrmtrr(&vcpu->mtrr, num, val) != 0) {  in vmx_wrmsr()
462 			vm_inject_gp(vcpu->vcpu);  in vmx_wrmsr()
487 			vcpu->guest_msrs[IDX_MSR_PAT] = val;  in vmx_wrmsr()
489 			vm_inject_gp(vcpu->vcpu);  in vmx_wrmsr()
492 		error = vmx_set_tsc_offset(vcpu, val - rdtsc());  in vmx_wrmsr()
501 			vcpu->guest_msrs[IDX_MSR_TSC_AUX] = val;  in vmx_wrmsr()
503 			vm_inject_gp(vcpu->vcpu);  in vmx_wrmsr()